dmesg:// <5>Linux version 2.6.18-1.2798.fc6 (brewbuilder@hs20-bc2-4.build.redhat.com) (gcc version 4.1.1 20061011 (Red Hat 4.1.1-30)) #1 SMP Mon Oct 16 14:37:32 EDT 2006 <6>BIOS-provided physical RAM map: <4> BIOS-e820: 0000000000000000 - 000000000009fc00 (usable) <4> BIOS-e820: 000000000009fc00 - 00000000000a0000 (reserved) <4> BIOS-e820: 00000000000e4000 - 0000000000100000 (reserved) <4> BIOS-e820: 0000000000100000 - 000000003ffb0000 (usable) <4> BIOS-e820: 000000003ffb0000 - 000000003ffbe000 (ACPI data) <4> BIOS-e820: 000000003ffbe000 - 000000003ffe0000 (ACPI NVS) <4> BIOS-e820: 000000003ffe0000 - 0000000040000000 (reserved) <4> BIOS-e820: 00000000fec00000 - 00000000fec01000 (reserved) <4> BIOS-e820: 00000000fecc0000 - 00000000fecc1000 (reserved) <4> BIOS-e820: 00000000ff780000 - 0000000100000000 (reserved) <5>127MB HIGHMEM available. <5>896MB LOWMEM available. <6>found SMP MP-table at 000ff780 <4>Using x86 segment limits to approximate NX protection <7>On node 0 totalpages: 262064 <7> DMA zone: 4096 pages, LIFO batch:0 <7> Normal zone: 225280 pages, LIFO batch:31 <7> HighMem zone: 32688 pages, LIFO batch:7 <6>DMI present. <6>Using APIC driver default <7>ACPI: RSDP (v002 ACPIAM ) @ 0x000fa960 <7>ACPI: XSDT (v001 NEC 0x02000709 MSFT 0x00000097) @ 0x3ffb0100 <7>ACPI: FADT (v003 A_M_I_ OEMFACP 0x02000709 MSFT 0x00000097) @ 0x3ffb0290 <7>ACPI: MADT (v001 A_M_I_ OEMAPIC 0x02000709 MSFT 0x00000097) @ 0x3ffb0390 <7>ACPI: MCFG (v001 A_M_I_ OEMMCFG 0x02000709 MSFT 0x00000097) @ 0x3ffb0400 <7>ACPI: SLIC (v001 NEC 0x02000709 MSFT 0x00000097) @ 0x3ffb0440 <7>ACPI: OEMB (v001 A_M_I_ AMI_OEM 0x02000709 MSFT 0x00000097) @ 0x3ffbe040 <7>ACPI: HPET (v001 A_M_I_ OEMHPET 0x02000709 MSFT 0x00000097) @ 0x3ffb5400 <7>ACPI: SSDT (v001 A_M_I_ POWERNOW 0x00000001 AMD 0x00000001) @ 0x3ffb5440 <7>ACPI: DSDT (v001 A0498 A0498000 0x00000000 INTL 0x20060113) @ 0x00000000 <6>ACPI: PM-Timer IO Port: 0x808 <7>ACPI: Local APIC address 0xfee00000 <6>ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled) <4>Processor #0 15:11 APIC version 16 <6>ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled) <4>Processor #1 15:11 APIC version 16 <6>ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) <4>IOAPIC[0]: apic_id 2, version 3, address 0xfec00000, GSI 0-23 <6>ACPI: IOAPIC (id[0x03] address[0xfecc0000] gsi_base[24]) <4>IOAPIC[1]: apic_id 3, version 3, address 0xfecc0000, GSI 24-47 <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) <6>ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) <7>ACPI: IRQ0 used by override. <7>ACPI: IRQ2 used by override. <7>ACPI: IRQ9 used by override. <4>Enabling APIC mode: Flat. Using 2 I/O APICs <6>ACPI: HPET id: 0xffffffff base: 0xfed00000 <6>Using ACPI (MADT) for SMP configuration information <4>Allocating PCI resources starting at 50000000 (gap: 40000000:bec00000) <4>Detected 1999.955 MHz processor. <4>Built 1 zonelists. Total pages: 262064 <5>Kernel command line: initrd=initrd.img ramdisk_size=8192 pci=nommconf BOOT_IMAGE=a223844b <7>mapped APIC to ffffd000 (fee00000) <7>mapped IOAPIC to ffffc000 (fec00000) <7>mapped IOAPIC to ffffb000 (fecc0000) <6>Enabling fast FPU save and restore... done. <6>Enabling unmasked SIMD FPU exception support... done. <6>Initializing CPU#0 <4>CPU 0 irqstacks, hard=c07ae000 soft=c078e000 <4>PID hash table entries: 4096 (order: 12, 16384 bytes) <4>Console: colour VGA+ 80x25 <4>Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) <4>Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) <6>Memory: 988868k/1048256k available (2138k kernel code, 58664k reserved, 868k data, 240k init, 130752k highmem) <4>Checking if this processor honours the WP bit even in supervisor mode... Ok. <4>Calibrating delay using timer specific routine.. 4002.27 BogoMIPS (lpj=8004550) <6>Security Framework v1.0.0 initialized <6>SELinux: Initializing. <6>SELinux: Starting in permissive mode <6>selinux_register_security: Registering secondary module capability <6>Capability LSM initialized as secondary <4>Mount-cache hash table entries: 512 <7>CPU: After generic identify, caps: 178bfbff ebd3fbff 00000000 00000000 00002001 00000000 0000001f <7>CPU: After vendor identify, caps: 178bfbff ebd3fbff 00000000 00000000 00002001 00000000 0000001f <6>CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) <6>CPU: L2 Cache: 512K (64 bytes/line) <6>CPU 0(2) -> Core 0 <7>CPU: After all inits, caps: 178bf3ff ebd3fbff 00000000 00000410 00002001 00000000 0000001f <6>Intel machine check architecture supported. <6>Intel machine check reporting enabled on CPU#0. <6>Checking 'hlt' instruction... OK. <6>SMP alternatives: switching to UP code <6>ACPI: Core revision 20060707 <4>CPU0: AMD Athlon(tm) 64 X2 Dual Core Processor 3800+ stepping 02 <6>SMP alternatives: switching to SMP code <4>Booting processor 1/1 eip 3000 <4>CPU 1 irqstacks, hard=c07af000 soft=c078f000 <6>Initializing CPU#1 <4>Calibrating delay using timer specific routine.. 3999.66 BogoMIPS (lpj=7999333) <7>CPU: After generic identify, caps: 178bfbff ebd3fbff 00000000 00000000 00002001 00000000 0000001f <7>CPU: After vendor identify, caps: 178bfbff ebd3fbff 00000000 00000000 00002001 00000000 0000001f <6>CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) <6>CPU: L2 Cache: 512K (64 bytes/line) <6>CPU 1(2) -> Core 1 <7>CPU: After all inits, caps: 178bf3ff ebd3fbff 00000000 00000410 00002001 00000000 0000001f <6>Intel machine check architecture supported. <6>Intel machine check reporting enabled on CPU#1. <4>CPU1: AMD Athlon(tm) 64 X2 Dual Core Processor 3800+ stepping 02 <6>Total of 2 processors activated (8001.94 BogoMIPS). <4>ENABLING IO-APIC IRQs <6>..TIMER: vector=0x31 apic1=0 pin1=2 apic2=0 pin2=0 <6>checking TSC synchronization across 2 CPUs: <6>CPU#0 had 1387 usecs TSC skew, fixed it up. <6>CPU#1 had -1387 usecs TSC skew, fixed it up. <6>Brought up 2 CPUs <7>sizeof(vma)=84 bytes <7>sizeof(page)=32 bytes <7>sizeof(inode)=424 bytes <7>sizeof(dentry)=148 bytes <7>sizeof(ext3inode)=600 bytes <7>sizeof(buffer_head)=52 bytes <7>sizeof(skbuff)=172 bytes <7>sizeof(task_struct)=1392 bytes <4>migration_cost=206 <6>checking if image is initramfs... it is <6>Freeing initrd memory: 45202k freed <6>NET: Registered protocol family 16 <6>ACPI: bus type pci registered <6>PCI: PCI BIOS revision 3.00 entry at 0xf0031, last bus=128 <6>PCI: Using configuration type 1 <4>Setting up standard PCI resources <6>ACPI: Interpreter enabled <6>ACPI: Using IOAPIC for interrupt routing <4>Error attaching device data <4>Error attaching device data <6>ACPI: PCI Root Bridge [PCI0] (0000:00) <7>PCI: Probing PCI hardware (bus 00) <7>Boot video device is 0000:02:00.0 <6>PCI: Transparent bridge - 0000:00:13.1 <7>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT] <7>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT] <7>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NBPG._PRT] <7>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NBP0._PRT] <7>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NBP1._PRT] <7>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NBP2._PRT] <7>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.NBP3._PRT] <7>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P9._PRT] <7>ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0PA._PRT] <4>ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 10 *11 12 14 15) <4>ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 *10 11 12 14 15) <4>ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 *5 6 7 10 11 12 14 15) <4>ACPI: PCI Interrupt Link [LNKD] (IRQs *3 4 5 6 7 10 11 12 14 15) <4>ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled. <4>ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled. <4>ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled. <4>ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 7 10 *11 12 14 15) <6>Linux Plug and Play Support v0.97 (c) Adam Belay <6>pnp: PnP ACPI init <6>pnp: PnP ACPI: found 16 devices <6>usbcore: registered new driver usbfs <6>usbcore: registered new driver hub <6>PCI: Using ACPI for IRQ routing <6>PCI: If a device doesn't work, try "pci=routeirq". If it helps, post a report <6>NetLabel: Initializing <6>NetLabel: domain hash size = 128 <6>NetLabel: protocols = UNLABELED CIPSOv4 <6>NetLabel: unlabeled traffic allowed by default <6>pnp: 00:06: ioport range 0xc00-0xc0f has been reserved <6>pnp: 00:06: ioport range 0xd00-0xd0f has been reserved <6>pnp: 00:06: ioport range 0xa20-0xa2f has been reserved <6>pnp: 00:06: ioport range 0xa30-0xa3f has been reserved <6>PCI: Bridge: 0000:00:01.0 <6> IO window: disabled. <6> MEM window: disabled. <6> PREFETCH window: disabled. <6>PCI: Bridge: 0000:00:02.0 <6> IO window: disabled. <6> MEM window: f9000000-fbcfffff <6> PREFETCH window: d0000000-dfffffff <6>PCI: Bridge: 0000:00:03.0 <6> IO window: disabled. <6> MEM window: disabled. <6> PREFETCH window: f7f00000-f7ffffff <6>PCI: Bridge: 0000:00:03.1 <6> IO window: disabled. <6> MEM window: disabled. <6> PREFETCH window: f7e00000-f7efffff <6>PCI: Bridge: 0000:00:03.2 <6> IO window: disabled. <6> MEM window: fbd00000-fbdfffff <6> PREFETCH window: disabled. <6>PCI: Bridge: 0000:00:03.3 <6> IO window: disabled. <6> MEM window: disabled. <6> PREFETCH window: f7d00000-f7dfffff <6>PCI: Bridge: 0000:00:13.0 <6> IO window: disabled. <6> MEM window: fbf00000-fbffffff <6> PREFETCH window: disabled. <6>PCI: Bridge: 0000:00:13.1 <6> IO window: e000-efff <6> MEM window: fbe00000-fbefffff <6> PREFETCH window: 50000000-500fffff <7>PCI: Setting latency timer of device 0000:00:01.0 to 64 <6>ACPI: PCI Interrupt 0000:00:02.0[A] -> GSI 27 (level, low) -> IRQ 169 <7>PCI: Setting latency timer of device 0000:00:02.0 to 64 <6>ACPI: PCI Interrupt 0000:00:03.0[A] -> GSI 31 (level, low) -> IRQ 177 <7>PCI: Setting latency timer of device 0000:00:03.0 to 64 <6>ACPI: PCI Interrupt 0000:00:03.1[B] -> GSI 35 (level, low) -> IRQ 185 <7>PCI: Setting latency timer of device 0000:00:03.1 to 64 <6>ACPI: PCI Interrupt 0000:00:03.2[C] -> GSI 39 (level, low) -> IRQ 193 <7>PCI: Setting latency timer of device 0000:00:03.2 to 64 <6>ACPI: PCI Interrupt 0000:00:03.3[D] -> GSI 43 (level, low) -> IRQ 201 <7>PCI: Setting latency timer of device 0000:00:03.3 to 64 <7>PCI: Setting latency timer of device 0000:00:13.0 to 64 <7>PCI: Setting latency timer of device 0000:00:13.1 to 64 <6>NET: Registered protocol family 2 <4>IP route cache hash table entries: 32768 (order: 5, 131072 bytes) <4>TCP established hash table entries: 131072 (order: 9, 2621440 bytes) <4>TCP bind hash table entries: 65536 (order: 8, 1310720 bytes) <6>TCP: Hash tables configured (established 131072 bind 65536) <6>TCP reno registered <6>apm: BIOS version 1.2 Flags 0x03 (Driver version 1.16ac) <5>apm: disabled - APM is not SMP safe. <6>audit: initializing netlink socket (disabled) <5>audit(1175419067.540:1): initialized <4>highmem bounce pool size: 64 pages <4>Total HugeTLB memory allocated, 0 <5>VFS: Disk quotas dquot_6.5.1 <4>Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) <6>SELinux: Registering netfilter hooks <6>Initializing Cryptographic API <4>ksign: Installing public key data <4>Loading keyring <4>- Added public key 8BDC589434DBC709 <4>- User ID: Red Hat, Inc. (Kernel Module GPG key) <6>io scheduler noop registered <6>io scheduler anticipatory registered <6>io scheduler deadline registered <6>io scheduler cfq registered (default) <7>PCI: Setting latency timer of device 0000:00:02.0 to 64 <4>assign_interrupt_mode Found MSI capability <7>Allocate Port Service[0000:00:02.0:pcie00] <7>Allocate Port Service[0000:00:02.0:pcie02] <7>PCI: Setting latency timer of device 0000:00:03.0 to 64 <4>assign_interrupt_mode Found MSI capability <7>Allocate Port Service[0000:00:03.0:pcie00] <7>Allocate Port Service[0000:00:03.0:pcie02] <7>PCI: Setting latency timer of device 0000:00:03.1 to 64 <4>assign_interrupt_mode Found MSI capability <7>Allocate Port Service[0000:00:03.1:pcie00] <7>Allocate Port Service[0000:00:03.1:pcie02] <7>PCI: Setting latency timer of device 0000:00:03.2 to 64 <4>assign_interrupt_mode Found MSI capability <7>Allocate Port Service[0000:00:03.2:pcie00] <7>Allocate Port Service[0000:00:03.2:pcie02] <7>PCI: Setting latency timer of device 0000:00:03.3 to 64 <4>assign_interrupt_mode Found MSI capability <7>Allocate Port Service[0000:00:03.3:pcie00] <7>Allocate Port Service[0000:00:03.3:pcie02] <6>pci_hotplug: PCI Hot Plug PCI Core version: 0.5 <6>ACPI: Processor [P001] (supports 16 throttling states) <6>isapnp: Scanning for PnP cards... <6>isapnp: No Plug & Play device found <6>Real Time Clock Driver v1.12ac <6>Non-volatile memory driver v1.2 <6>Linux agpgart interface v0.101 (c) Dave Jones <6>Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing enabled <6>serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A <6>00:0b: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A <4>RAMDISK driver initialized: 16 RAM disks of 8192K size 4096 blocksize <6>Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 <6>ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx <6>VP_IDE: IDE controller at PCI slot 0000:00:0f.1 <6>PCI: VIA IRQ fixup for 0000:00:0f.1, from 255 to 0 <6>VP_IDE: chipset revision 7 <6>VP_IDE: not 100% native mode: will probe irqs later <6>VP_IDE: VIA vt8237a (rev 00) IDE UDMA133 controller on pci0000:00:0f.1 <6> ide0: BM-DMA at 0xfc00-0xfc07, BIOS settings: hda:DMA, hdb:pio <6> ide1: BM-DMA at 0xfc08-0xfc0f, BIOS settings: hdc:pio, hdd:pio <7>Probing IDE interface ide0... <4>hda: _NEC DVD_RW ND-3550A, ATAPI CD/DVD-ROM drive <4>ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 <7>Probing IDE interface ide1... <7>Probing IDE interface ide1... <4>ide-floppy driver 0.99.newide <6>usbcore: registered new driver libusual <6>usbcore: registered new driver hiddev <6>usbcore: registered new driver usbhid <6>drivers/usb/input/hid-core.c: v2.6:USB HID core driver <6>PNP: PS/2 Controller [PNP0303:PS2K,PNP0f03:PS2M] at 0x60,0x64 irq 1,12 <6>serio: i8042 AUX port at 0x60,0x64 irq 12 <6>serio: i8042 KBD port at 0x60,0x64 irq 1 <6>mice: PS/2 mouse device common for all mice <6>md: md driver 0.90.3 MAX_MD_DEVS=256, MD_SB_DISKS=27 <6>md: bitmap version 4.39 <6>TCP bic registered <6>Initializing IPsec netlink socket <6>NET: Registered protocol family 1 <6>NET: Registered protocol family 17 <6>powernow-k8: Found 2 AMD Athlon(tm) 64 X2 Dual Core Processor 3800+ processors (version 2.00.00) <6>powernow-k8: 0 : fid 0xc (2000 MHz), vid 0x8 <6>powernow-k8: 1 : fid 0xa (1800 MHz), vid 0xa <6>powernow-k8: 2 : fid 0x2 (1000 MHz), vid 0x12 <4>Using IPI No-Shortcut mode <6>ACPI: (supports S0 S1 S3 S4 S5) <6>Freeing unused kernel memory: 240k freed <4>Write protecting the kernel read-only data: 386k <6>Time: acpi_pm clocksource has been installed. <6>input: AT Translated Set 2 keyboard as /class/input/input0 <6>hda: ATAPI 48X DVD-ROM DVD-R CD-R/RW drive, 2048kB Cache, UDMA(33) <6>Uniform CD-ROM driver Revision: 3.20 <6>r8169 Gigabit Ethernet driver 2.2LK-NAPI loaded <6>ACPI: PCI Interrupt 0000:07:07.0[A] -> GSI 17 (level, low) -> IRQ 66 <7>eth0: Identified chip type is 'RTL8169s/8110s'. <6>eth0: RTL8169 at 0xf8822c00, 00:e0:4c:77:5f:d6, IRQ 66 <6>EDAC MC: Ver: 2.0.1 Oct 16 2006 <6>USB Universal Host Controller Interface driver v3.0 <6>ACPI: PCI Interrupt 0000:00:10.0[A] -> GSI 20 (level, low) -> IRQ 74 <6>PCI: VIA IRQ fixup for 0000:00:10.0, from 11 to 10 <6>uhci_hcd 0000:00:10.0: UHCI Host Controller <6>uhci_hcd 0000:00:10.0: new USB bus registered, assigned bus number 1 <6>uhci_hcd 0000:00:10.0: irq 74, io base 0x0000c480 <6>usb usb1: configuration #1 chosen from 1 choice <6>hub 1-0:1.0: USB hub found <6>hub 1-0:1.0: 2 ports detected <5>SCSI subsystem initialized <7>libata version 2.00 loaded. <6>ACPI: PCI Interrupt 0000:00:10.1[B] -> GSI 22 (level, low) -> IRQ 82 <6>PCI: VIA IRQ fixup for 0000:00:10.1, from 10 to 2 <6>uhci_hcd 0000:00:10.1: UHCI Host Controller <6>uhci_hcd 0000:00:10.1: new USB bus registered, assigned bus number 2 <6>uhci_hcd 0000:00:10.1: irq 82, io base 0x0000c800 <6>usb usb2: configuration #1 chosen from 1 choice <6>hub 2-0:1.0: USB hub found <6>hub 2-0:1.0: 2 ports detected <6>input: PC Speaker as /class/input/input1 <6>ACPI: PCI Interrupt 0000:00:10.2[C] -> GSI 21 (level, low) -> IRQ 90 <6>PCI: VIA IRQ fixup for 0000:00:10.2, from 5 to 10 <6>uhci_hcd 0000:00:10.2: UHCI Host Controller <6>uhci_hcd 0000:00:10.2: new USB bus registered, assigned bus number 3 <6>uhci_hcd 0000:00:10.2: irq 90, io base 0x0000c880 <6>usb usb3: configuration #1 chosen from 1 choice <6>hub 3-0:1.0: USB hub found <6>hub 3-0:1.0: 2 ports detected <6>Floppy drive(s): fd0 is 1.44M <6>FDC 0 is a post-1991 82077 <6>ACPI: PCI Interrupt 0000:00:10.3[D] -> GSI 23 (level, low) -> IRQ 98 <6>PCI: VIA IRQ fixup for 0000:00:10.3, from 3 to 2 <6>uhci_hcd 0000:00:10.3: UHCI Host Controller <6>uhci_hcd 0000:00:10.3: new USB bus registered, assigned bus number 4 <6>uhci_hcd 0000:00:10.3: irq 98, io base 0x0000cc00 <6>usb usb4: configuration #1 chosen from 1 choice <6>hub 4-0:1.0: USB hub found <6>hub 4-0:1.0: 2 ports detected <6>ACPI: PCI Interrupt 0000:00:10.4[C] -> GSI 21 (level, low) -> IRQ 90 <6>PCI: VIA IRQ fixup for 0000:00:10.4, from 5 to 10 <6>ehci_hcd 0000:00:10.4: EHCI Host Controller <6>ehci_hcd 0000:00:10.4: new USB bus registered, assigned bus number 5 <6>ehci_hcd 0000:00:10.4: irq 90, io mem 0xf8fffc00 <6>ehci_hcd 0000:00:10.4: USB 2.0 started, EHCI 1.00, driver 10 Dec 2004 <6>usb usb5: configuration #1 chosen from 1 choice <6>hub 5-0:1.0: USB hub found <6>hub 5-0:1.0: 8 ports detected <6>ACPI: PCI Interrupt 0000:80:01.0[A] -> GSI 17 (level, low) -> IRQ 66 <7>PCI: Setting latency timer of device 0000:80:01.0 to 64 <7>sata_via 0000:00:0f.0: version 2.0 <6>ACPI: PCI Interrupt 0000:00:0f.0[B] -> GSI 21 (level, low) -> IRQ 90 <6>sata_via 0000:00:0f.0: routed to hard irq line 10 <6>ata1: SATA max UDMA/133 cmd 0xDC00 ctl 0xD882 bmdma 0xD400 irq 90 <6>ata2: SATA max UDMA/133 cmd 0xD800 ctl 0xD482 bmdma 0xD408 irq 90 <6>scsi0 : sata_via <6>ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300) <6>ata1.00: ATA-7, max UDMA/133, 488397168 sectors: LBA48 <6>ata1.00: ata1: dev 0 multi count 16 <6>ata1.00: configured for UDMA/133 <6>scsi1 : sata_via <6>ata2: SATA link down 1.5 Gbps (SStatus 0 SControl 300) <4>ATA: abnormal status 0x7F on port 0xD807 <5> Vendor: ATA Model: WDC WD2500KS-00M Rev: 02.0 <5> Type: Direct-Access ANSI SCSI revision: 05 <6>EDAC MC0: Giving out device to k8_edac Athlon64/Opteron: DEV 0000:00:18.2 <5>scsi 0:0:0:0: Attached scsi generic sg0 type 0 <5>SCSI device sda: 488397168 512-byte hdwr sectors (250059 MB) <5>sda: Write Protect is off <7>sda: Mode Sense: 00 3a 00 00 <5>SCSI device sda: drive cache: write back <5>SCSI device sda: 488397168 512-byte hdwr sectors (250059 MB) <5>sda: Write Protect is off <7>sda: Mode Sense: 00 3a 00 00 <5>SCSI device sda: drive cache: write back <6> sda: sda1 sda2 sda3 <5>sd 0:0:0:0: Attached scsi disk sda e820:// dmesg:// E820 memory layout table ------------------------------------- 0000000000000000 - 000000000009fc00 OS used ram 000000000009fc00 - 00000000000a0000 <reserved> 00000000000e4000 - 0000000000100000 <reserved> 0000000000100000 - 000000003ffb0000 OS used ram 000000003ffb0000 - 000000003ffbe000 <ACPI use> 000000003ffbe000 - 000000003ffe0000 <ACPI use> 000000003ffe0000 - 0000000040000000 <reserved> 00000000fec00000 - 00000000fec01000 <reserved> 00000000fecc0000 - 00000000fecc1000 <reserved> 00000000ff780000 - 0000000100000000 <reserved> dmesg://virt dmesg:// <6>usb 2-1: new low speed USB device using uhci_hcd and address 2 <6>usb 2-1: configuration #1 chosen from 1 choice <6>input: Microsoft Basic Optical Mouse as /class/input/input2 <6>input: USB HID v1.10 Mouse [Microsoft Basic Optical Mouse] on usb-0000:00:10.1-1 dmesg://maxreadreq dmesg:// interrupts:// Interrupt distribution table: CPU0 CPU1 0: 61 3904 IO-APIC-edge timer 1: 0 9 IO-APIC-edge i8042 6: 0 3 IO-APIC-edge floppy 8: 0 0 IO-APIC-edge rtc 9: 0 0 IO-APIC-level acpi 14: 0 24 IO-APIC-edge ide0 66: 0 148 IO-APIC-level HDA Intel 74: 0 0 IO-APIC-level uhci_hcd:usb1 82: 0 28 IO-APIC-level uhci_hcd:usb2 90: 0 75 IO-APIC-level uhci_hcd:usb3, ehci_hcd:usb5, libata 98: 0 0 IO-APIC-level uhci_hcd:usb4 NMI: 0 0 LOC: 3909 3907 ERR: 0 MIS: 0 dmesg://apicedge dmesg:// dmesg://os2gap dmesg:// dmi:// DMI information: # dmidecode 2.7 SMBIOS 2.4 present. 54 structures occupying 2032 bytes. Table at 0x000F0750. Handle 0x0000, DMI type 0, 24 bytes. BIOS Information Vendor: American Megatrends Inc. Version: 1603 Release Date: 02/09/2007 Address: 0xF0000 Runtime Size: 64 kB ROM Size: 6528 kB Characteristics: ISA is supported PCI is supported PNP is supported APM is supported BIOS is upgradeable BIOS shadowing is allowed ESCD support is available Boot from CD is supported Selectable boot is supported BIOS ROM is socketed EDD is supported 5.25"/1.2 MB floppy services are supported (int 13h) 3.5"/720 KB floppy services are supported (int 13h) 3.5"/2.88 MB floppy services are supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) CGA/mono video services are supported (int 10h) ACPI is supported USB legacy is supported LS-120 boot is supported ATAPI Zip drive boot is supported BIOS boot specification is supported Targeted content distribution is supported BIOS Revision: 8.12 Handle 0x0001, DMI type 1, 27 bytes. System Information Manufacturer: System manufacturer Product Name: System Product Name Version: System Version Serial Number: System Serial Number UUID: 1CF75E7A-74FE-D511-81CF-E00250CC0F1E Wake-up Type: Power Switch SKU Number: To Be Filled By O.E.M. Family: To Be Filled By O.E.M. Handle 0x0002, DMI type 2, 15 bytes. Base Board Information Manufacturer: ASUSTeK Computer INC. Product Name: M2V Version: Rev 1.xx Serial Number: MB-1234567890 Asset Tag: To Be Filled By O.E.M. Features: Board is a hosting board Board is replaceable Location In Chassis: To Be Filled By O.E.M. Chassis Handle: 0x0003 Type: Motherboard Contained Object Handles: 0 Handle 0x0003, DMI type 3, 21 bytes. Chassis Information Manufacturer: Chassis Manufacture Type: Desktop Lock: Not Present Version: Chassis Version Serial Number: Chassis Serial Number Asset Tag: Asset-1234567890 Boot-up State: Safe Power Supply State: Safe Thermal State: Safe Security Status: None OEM Information: 0x00000001 Heigth: Unspecified Number Of Power Cords: 1 Contained Elements: 0 Handle 0x0004, DMI type 4, 35 bytes. Processor Information Socket Designation: SOCKET AM2 Type: Central Processor Family: Athlon 64 Manufacturer: AMD ID: B2 0F 04 00 FF FB 8B 17 Signature: Extended Family 0, Model B, Stepping 2 Flags: FPU (Floating-point unit on-chip) VME (Virtual mode extension) DE (Debugging extension) PSE (Page size extension) TSC (Time stamp counter) MSR (Model specific registers) PAE (Physical address extension) MCE (Machine check exception) CX8 (CMPXCHG8 instruction supported) APIC (On-chip APIC hardware supported) SEP (Fast system call) MTRR (Memory type range registers) PGE (Page global enable) MCA (Machine check architecture) CMOV (Conditional move instruction supported) PAT (Page attribute table) PSE-36 (36-bit page size extension) CLFSH (CLFLUSH instruction supported) MMX (MMX technology supported) FXSR (Fast floating-point save and restore) SSE (Streaming SIMD extensions) SSE2 (Streaming SIMD extensions 2) HTT (Hyper-threading technology) Version: AMD Athlon(tm) 64 X2 Dual Core Processor 3800+ Voltage: 1.5 V External Clock: 200 MHz Max Speed: 3000 MHz Current Speed: 2000 MHz Status: Populated, Enabled Upgrade: <OUT OF SPEC> L1 Cache Handle: 0x0005 L2 Cache Handle: 0x0006 L3 Cache Handle: 0x0007 Serial Number: To Be Filled By O.E.M. Asset Tag: To Be Filled By O.E.M. Part Number: To Be Filled By O.E.M. Handle 0x0005, DMI type 7, 19 bytes. Cache Information Socket Designation: L1-Cache Configuration: Enabled, Not Socketed, Level 1 Operational Mode: Varies With Memory Address Location: Internal Installed Size: 128 KB Maximum Size: 128 KB Supported SRAM Types: Pipeline Burst Installed SRAM Type: Pipeline Burst Speed: Unknown Error Correction Type: Single-bit ECC System Type: Data Associativity: 4-way Set-associative Handle 0x0006, DMI type 7, 19 bytes. Cache Information Socket Designation: L2-Cache Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Varies With Memory Address Location: Internal Installed Size: 1024 KB Maximum Size: 1024 KB Supported SRAM Types: Pipeline Burst Installed SRAM Type: Pipeline Burst Speed: Unknown Error Correction Type: Single-bit ECC System Type: Unified Associativity: 4-way Set-associative Handle 0x0007, DMI type 7, 19 bytes. Cache Information Socket Designation: L3-Cache Configuration: Disabled, Not Socketed, Level 3 Operational Mode: Unknown Location: Internal Installed Size: 0 KB Maximum Size: 0 KB Supported SRAM Types: Unknown Installed SRAM Type: Unknown Speed: Unknown Error Correction Type: Unknown System Type: Unknown Associativity: Unknown Handle 0x0008, DMI type 6, 12 bytes. Memory Module Information Socket Designation: DIMM0 Bank Connections: 6 0 Current Speed: 30 ns Type: ECC DIMM Installed Size: 512 MB (Single-bank Connection) Enabled Size: 512 MB (Single-bank Connection) Error Status: OK Handle 0x0009, DMI type 6, 12 bytes. Memory Module Information Socket Designation: DIMM1 Bank Connections: 6 0 Current Speed: 30 ns Type: ECC DIMM Installed Size: 512 MB (Single-bank Connection) Enabled Size: 512 MB (Single-bank Connection) Error Status: OK Handle 0x000A, DMI type 6, 12 bytes. Memory Module Information Socket Designation: DIMM2 Bank Connections: None Current Speed: Unknown Type: Unknown Installed Size: Not Installed Enabled Size: Not Installed Error Status: OK Handle 0x000B, DMI type 6, 12 bytes. Memory Module Information Socket Designation: DIMM3 Bank Connections: None Current Speed: Unknown Type: Unknown Installed Size: Not Installed Enabled Size: Not Installed Error Status: OK Handle 0x000C, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: PS/2 Mouse Internal Connector Type: None External Reference Designator: PS2Mouse External Connector Type: PS/2 Port Type: Mouse Port Handle 0x000D, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: PS/2 Keyboard Internal Connector Type: None External Reference Designator: Keyboard External Connector Type: PS/2 Port Type: Keyboard Port Handle 0x000E, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: USB1 Internal Connector Type: None External Reference Designator: USB1 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x000F, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: USB2 Internal Connector Type: None External Reference Designator: USB2 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0010, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: USB3 Internal Connector Type: None External Reference Designator: USB3 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0011, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: USB4 Internal Connector Type: None External Reference Designator: USB4 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0012, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: LPT1 Internal Connector Type: None External Reference Designator: LPT1 External Connector Type: DB-25 female Port Type: Parallel Port ECP/EPP Handle 0x0013, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: Audio Line_Out Internal Connector Type: None External Reference Designator: Audio Line_Out External Connector Type: Mini Jack (headphones) Port Type: Audio Port Handle 0x0014, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: Audio Line_In Internal Connector Type: None External Reference Designator: Audio Line_In External Connector Type: Mini Jack (headphones) Port Type: Audio Port Handle 0x0015, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: Audio Mic_In Internal Connector Type: None External Reference Designator: Audio Mic_In External Connector Type: Mini Jack (headphones) Port Type: Audio Port Handle 0x0016, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: LAN1 Internal Connector Type: None External Reference Designator: LAN1 External Connector Type: RJ-45 Port Type: Network Port Handle 0x0017, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: PRI IDE Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0018, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: SEC IDE Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0019, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: SB_SATA1 Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001A, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: SB_SATA2 Internal Connector Type: On Board IDE External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001B, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: FLOPPY Internal Connector Type: On Board Floppy External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001C, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: USB5 Internal Connector Type: Access Bus (USB) External Reference Designator: Not Specified External Connector Type: None Port Type: USB Handle 0x001D, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: USB6 Internal Connector Type: Access Bus (USB) External Reference Designator: Not Specified External Connector Type: None Port Type: USB Handle 0x001E, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: USB7 Internal Connector Type: Access Bus (USB) External Reference Designator: Not Specified External Connector Type: None Port Type: USB Handle 0x001F, DMI type 8, 9 bytes. Port Connector Information Internal Reference Designator: USB8 Internal Connector Type: Access Bus (USB) External Reference Designator: Not Specified External Connector Type: None Port Type: USB Handle 0x0020, DMI type 9, 13 bytes. System Slot Information Designation: PCIEx1 Type: 32-bit PCI Express Current Usage: Available Length: Long Characteristics: 3.3 V is provided Opening is shared PME signal is supported Handle 0x0021, DMI type 9, 13 bytes. System Slot Information Designation: PCIEx16 Type: 32-bit PCI Express Current Usage: In Use Length: Long Characteristics: 3.3 V is provided Opening is shared PME signal is supported Handle 0x0022, DMI type 9, 13 bytes. System Slot Information Designation: PCI1 Type: 32-bit PCI Current Usage: Available Length: Short ID: 1 Characteristics: 3.3 V is provided Opening is shared PME signal is supported Handle 0x0023, DMI type 9, 13 bytes. System Slot Information Designation: PCI2 Type: 32-bit PCI Current Usage: In Use Length: Short ID: 2 Characteristics: 3.3 V is provided Opening is shared PME signal is supported Handle 0x0024, DMI type 9, 13 bytes. System Slot Information Designation: PCI3 Type: 32-bit PCI Current Usage: Available Length: Short ID: 3 Characteristics: 3.3 V is provided Opening is shared PME signal is supported Handle 0x0025, DMI type 9, 13 bytes. System Slot Information Designation: PCI4 Type: 32-bit PCI Current Usage: Available Length: Short ID: 4 Characteristics: 3.3 V is provided Opening is shared PME signal is supported Handle 0x0026, DMI type 10, 6 bytes. On Board Device Information Type: Video Status: Enabled Description: To Be Filled By O.E.M. Handle 0x0027, DMI type 11, 5 bytes. OEM Strings String 1: To Be Filled By O.E.M. String 2: To Be Filled By O.E.M. String 3: To Be Filled By O.E.M. String 4: To Be Filled By O.E.M. Handle 0x0028, DMI type 13, 22 bytes. BIOS Language Information Installable Languages: 1 en|US|iso8859-1 Currently Installed Language: en|US|iso8859-1 Handle 0x0029, DMI type 15, 35 bytes. System Event Log Area Length: 4 bytes Header Start Offset: 0x0000 Header Length: 2 bytes Data Start Offset: 0x0002 Access Method: Indexed I/O, one 16-bit index port, one 8-bit data port Access Address: Index 0x046A, Data 0x046C Status: Invalid, Not Full Change Token: 0x00000000 Header Format: No Header Supported Log Type Descriptors: 6 Descriptor 1: End of log Data Format 1: OEM-specific Descriptor 2: End of log Data Format 2: OEM-specific Descriptor 3: End of log Data Format 3: OEM-specific Descriptor 4: End of log Data Format 4: OEM-specific Descriptor 5: End of log Data Format 5: OEM-specific Descriptor 6: End of log Data Format 6: OEM-specific Handle 0x002A, DMI type 16, 15 bytes. Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: None Maximum Capacity: 8 GB Error Information Handle: Not Provided Number Of Devices: 4 Handle 0x002B, DMI type 19, 15 bytes. Memory Array Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0003FFFFFFF Range Size: 1 GB Physical Array Handle: 0x002A Partition Width: 0 Handle 0x002C, DMI type 17, 27 bytes. Memory Device Array Handle: 0x002A Error Information Handle: Not Provided Total Width: 64 bits Data Width: 72 bits Size: 512 MB Form Factor: DIMM Set: None Locator: DIMM0 Bank Locator: BANK0 Type: DDR2 Type Detail: Synchronous Speed: 333 MHz (3.0 ns) Manufacturer: Manufacturer0 Serial Number: SerNum0 Asset Tag: AssetTagNum0 Part Number: PartNum0 Handle 0x002D, DMI type 20, 19 bytes. Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x0001FFFFFFF Range Size: 512 MB Physical Device Handle: 0x002C Memory Array Mapped Address Handle: 0x002B Partition Row Position: 1 Handle 0x002E, DMI type 17, 27 bytes. Memory Device Array Handle: 0x002A Error Information Handle: Not Provided Total Width: 64 bits Data Width: 72 bits Size: 512 MB Form Factor: DIMM Set: None Locator: DIMM1 Bank Locator: BANK1 Type: DDR2 Type Detail: Synchronous Speed: 333 MHz (3.0 ns) Manufacturer: Manufacturer1 Serial Number: SerNum1 Asset Tag: AssetTagNum1 Part Number: PartNum1 Handle 0x002F, DMI type 20, 19 bytes. Memory Device Mapped Address Starting Address: 0x00020000000 Ending Address: 0x0003FFFFFFF Range Size: 512 MB Physical Device Handle: 0x002E Memory Array Mapped Address Handle: 0x002B Partition Row Position: 1 Handle 0x0030, DMI type 17, 27 bytes. Memory Device Array Handle: 0x002A Error Information Handle: Not Provided Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: DIMM2 Bank Locator: BANK2 Type: Unknown Type Detail: Unknown Speed: Unknown Manufacturer: Manufacturer2 Serial Number: SerNum2 Asset Tag: AssetTagNum2 Part Number: PartNum2 Handle 0x0031, DMI type 126, 19 bytes. Inactive Handle 0x0032, DMI type 17, 27 bytes. Memory Device Array Handle: 0x002A Error Information Handle: Not Provided Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: DIMM Set: None Locator: DIMM3 Bank Locator: BANK3 Type: Unknown Type Detail: Unknown Speed: Unknown Manufacturer: Manufacturer3 Serial Number: SerNum3 Asset Tag: AssetTagNum3 Part Number: PartNum3 Handle 0x0033, DMI type 126, 19 bytes. Inactive Handle 0x0034, DMI type 32, 20 bytes. System Boot Information Status: No errors detected Handle 0x0035, DMI type 127, 4 bytes. End Of Table dmesg://dmi dmesg:// dmesg://microcode dmesg:// <6>IA-32 Microcode Update Driver: v1.14a <tigran@veritas.com> <3>microcode: CPU0 not a capable Intel processor <3>microcode: CPU1 not a capable Intel processor <3>microcode: error! Bad data in microcode data file <3>microcode: Error in the microcode data dmesg://thermal_trip dmesg:// dmesg://chk_hpet dmesg:// dmesg://FADT dmesg:// dmesg://fan dmesg:// mtrr:// MTRR overview ------------- 0x00000000 - 0x40000000 write-back dmesg://mtrr dmesg:// dmesg://mcfg dmesg:// dmesg://edd dmesg:// dmesg://ethernet dmesg:// <6>r8169: eth0: link down dmesg://cpufreq dmesg:// aml://RRIO --=[ RRIO ]=-- Method (RRIO, 4, NotSerialized) { Store ("RRIO", Debug) } aml://RDMA --=[ RDMA ]=-- Method (RDMA, 3, NotSerialized) { Store ("rDMA", Debug) } aml://_PIC --=[ _PIC ]=-- Method (_PIC, 1, NotSerialized) { If (Arg0) { Store (0xAA, DBG8) } Else { Store (0xAC, DBG8) } Store (Arg0, PICM) } aml://OSFL --=[ OSFL ]=-- Method (OSFL, 0, NotSerialized) { If (LNotEqual (OSVR, Ones)) { Return (OSVR) } If (LEqual (PICM, Zero)) { Store (0xAC, DBG8) } Store (One, OSVR) If (CondRefOf (_OSI, Local1)) { If (_OSI ("Windows 2001")) { Store (Zero, OSVR) } } Else { If (MCTH (_OS, "Microsoft Windows NT")) { Store (0x04, OSVR) } Else { If (MCTH (_OS, "Microsoft WindowsME: Millennium Edition")) { Store (0x02, OSVR) } If (MCTH (_OS, "Linux")) { Store (0x03, OSVR) } } } Return (OSVR) } aml://MCTH --=[ MCTH ]=-- Method (MCTH, 2, NotSerialized) { If (LLess (SizeOf (Arg0), SizeOf (Arg1))) { Return (Zero) } Add (SizeOf (Arg0), One, Local0) Name (BUF0, Buffer (Local0) {}) Name (BUF1, Buffer (Local0) {}) Store (Arg0, BUF0) Store (Arg1, BUF1) While (Local0) { Decrement (Local0) If (LNotEqual (DerefOf (Index (BUF0, Local0)), DerefOf (Index ( BUF1, Local0)))) { Return (Zero) } } Return (One) } aml://GPRW --=[ GPRW ]=-- Method (GPRW, 2, NotSerialized) { Store (Arg0, Index (PRWP, Zero)) Store (ShiftLeft (SS1, One), Local0) Or (Local0, ShiftLeft (SS2, 0x02), Local0) Or (Local0, ShiftLeft (SS3, 0x03), Local0) Or (Local0, ShiftLeft (SS4, 0x04), Local0) If (And (ShiftLeft (One, Arg1), Local0)) { Store (Arg1, Index (PRWP, One)) } Else { ShiftRight (Local0, One, Local0) If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { FindSetLeftBit (Local0, Index (PRWP, One)) } Else { FindSetRightBit (Local0, Index (PRWP, One)) } } Return (PRWP) } aml://_PR --=[ _PR ]=-- aml://_SB_.PCI0.^BN00 aml://_SB_.PCI0 --=[ _SB.PCI0.^BN00 ]=-- Method (^BN00, 0, NotSerialized) { Return (Zero) } aml://_SB_.PCI0._BBN aml://_SB_.PCI0 --=[ _SB.PCI0._BBN ]=-- Method (_BBN, 0, NotSerialized) { Return (BN00 ()) } aml://_SB_.PCI0._PRT aml://_SB_.PCI0 --=[ _SB.PCI0._PRT ]=-- Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR00) } Return (PR00) } aml://_SB_.PCI0._PRW aml://_SB_.PCI0 --=[ _SB.PCI0._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } aml://_SB_.PCI0._S3D aml://_SB_.PCI0 --=[ _SB.PCI0._S3D ]=-- Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } aml://_SB_.PCI0.NPTS aml://_SB_.PCI0 --=[ _SB.PCI0.NPTS ]=-- Method (NPTS, 1, NotSerialized) { } aml://_SB_.PCI0.NWAK aml://_SB_.PCI0 --=[ _SB.PCI0.NWAK ]=-- Method (NWAK, 1, NotSerialized) { } aml://_SB_.PCI0.VIAN aml://_SB_.PCI0 --=[ _SB.PCI0.VIAN ]=-- Device (VIAN) { Name (_ADR, Zero) } aml://_SB_.PCI0.NBF1 aml://_SB_.PCI0 --=[ _SB.PCI0.NBF1 ]=-- Device (NBF1) { Name (_ADR, One) } aml://_SB_.PCI0.NBF2 aml://_SB_.PCI0 --=[ _SB.PCI0.NBF2 ]=-- Device (NBF2) { Name (_ADR, 0x02) } aml://_SB_.PCI0.NBF3 aml://_SB_.PCI0 --=[ _SB.PCI0.NBF3 ]=-- Device (NBF3) { Name (_ADR, 0x03) } aml://_SB_.PCI0.NBF4 aml://_SB_.PCI0 --=[ _SB.PCI0.NBF4 ]=-- Device (NBF4) { Name (_ADR, 0x04) } aml://_SB_.PCI0.NBF5 aml://_SB_.PCI0 --=[ _SB.PCI0.NBF5 ]=-- Device (NBF5) { Name (_ADR, 0x05) } aml://_SB_.PCI0.NBF6 aml://_SB_.PCI0 --=[ _SB.PCI0.NBF6 ]=-- Device (NBF6) { Name (_ADR, 0x06) } aml://_SB_.PCI0.NBF7 aml://_SB_.PCI0 --=[ _SB.PCI0.NBF7 ]=-- Device (NBF7) { Name (_ADR, 0x07) } aml://_SB_.PCI0.P0P1._PRT aml://_SB_.PCI0.P0P1 --=[ _SB.PCI0.P0P1._PRT ]=-- Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR01) } Return (PR01) } aml://_SB_.PCI0.P0P1 aml://_SB_.PCI0 --=[ _SB.PCI0.P0P1 ]=-- Device (P0P1) { Name (_ADR, 0x00010000) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR01) } Return (PR01) } } aml://_SB_.PCI0.NBPG._PRT aml://_SB_.PCI0.NBPG --=[ _SB.PCI0.NBPG._PRT ]=-- Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR02) } Return (PR02) } aml://_SB_.PCI0.NBPG aml://_SB_.PCI0 --=[ _SB.PCI0.NBPG ]=-- Device (NBPG) { Name (_ADR, 0x00020000) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR02) } Return (PR02) } } aml://_SB_.PCI0.NBP0._PRT aml://_SB_.PCI0.NBP0 --=[ _SB.PCI0.NBP0._PRT ]=-- Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR03) } Return (PR03) } aml://_SB_.PCI0.NBP0 aml://_SB_.PCI0 --=[ _SB.PCI0.NBP0 ]=-- Device (NBP0) { Name (_ADR, 0x00030000) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR03) } Return (PR03) } } aml://_SB_.PCI0.NBP1._PRT aml://_SB_.PCI0.NBP1 --=[ _SB.PCI0.NBP1._PRT ]=-- Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR04) } Return (PR04) } aml://_SB_.PCI0.NBP1 aml://_SB_.PCI0 --=[ _SB.PCI0.NBP1 ]=-- Device (NBP1) { Name (_ADR, 0x00030001) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR04) } Return (PR04) } } aml://_SB_.PCI0.NBP2._PRT aml://_SB_.PCI0.NBP2 --=[ _SB.PCI0.NBP2._PRT ]=-- Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR05) } Return (PR05) } aml://_SB_.PCI0.NBP2 aml://_SB_.PCI0 --=[ _SB.PCI0.NBP2 ]=-- Device (NBP2) { Name (_ADR, 0x00030002) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR05) } Return (PR05) } } aml://_SB_.PCI0.NBP3._PRT aml://_SB_.PCI0.NBP3 --=[ _SB.PCI0.NBP3._PRT ]=-- Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR06) } Return (PR06) } aml://_SB_.PCI0.NBP3 aml://_SB_.PCI0 --=[ _SB.PCI0.NBP3 ]=-- Device (NBP3) { Name (_ADR, 0x00030003) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR06) } Return (PR06) } } aml://_SB_.PCI0.SATA._REG aml://_SB_.PCI0.SATA --=[ _SB.PCI0.SATA._REG ]=-- Method (_REG, 2, NotSerialized) { If (LEqual (Arg0, 0x02)) { Store (Arg1, REGF) } } aml://_SB_.PCI0.SATA._STA aml://_SB_.PCI0.SATA --=[ _SB.PCI0.SATA._STA ]=-- Method (_STA, 0, NotSerialized) { If (LEqual (CMD, Zero)) { Return (0x0D) } Else { Return (0x0F) } } aml://_SB_.PCI0.SATA.CHN0._STA aml://_SB_.PCI0.SATA.CHN0 --=[ _SB.PCI0.SATA.CHN0._STA ]=-- Method (_STA, 0, NotSerialized) { If (LEqual (SCC, One)) { Return (0x0F) } Else { Return (Zero) } } aml://_SB_.PCI0.SATA.CHN0._GTM aml://_SB_.PCI0.SATA.CHN0 --=[ _SB.PCI0.SATA.CHN0._GTM ]=-- Method (_GTM, 0, NotSerialized) { FZHD () Return (GTM (PMPT, PMUE, PMUT, PSPT, PSUE, PSUT)) } aml://_SB_.PCI0.SATA.CHN0._STM aml://_SB_.PCI0.SATA.CHN0 --=[ _SB.PCI0.SATA.CHN0._STM ]=-- Method (_STM, 3, NotSerialized) { } aml://_SB_.PCI0.SATA.CHN0.DRV0._GTF aml://_SB_.PCI0.SATA.CHN0.DRV0 --=[ _SB.PCI0.SATA.CHN0.DRV0._GTF ]=-- Method (_GTF, 0, NotSerialized) { Return (Zero) } aml://_SB_.PCI0.SATA.CHN0.DRV0 aml://_SB_.PCI0.SATA.CHN0 --=[ _SB.PCI0.SATA.CHN0.DRV0 ]=-- Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (Zero) } } aml://_SB_.PCI0.SATA.CHN0.DRV1._GTF aml://_SB_.PCI0.SATA.CHN0.DRV1 --=[ _SB.PCI0.SATA.CHN0.DRV1._GTF ]=-- Method (_GTF, 0, NotSerialized) { Return (Zero) } aml://_SB_.PCI0.SATA.CHN0.DRV1 aml://_SB_.PCI0.SATA.CHN0 --=[ _SB.PCI0.SATA.CHN0.DRV1 ]=-- Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (Zero) } } aml://_SB_.PCI0.SATA.CHN0 aml://_SB_.PCI0.SATA --=[ _SB.PCI0.SATA.CHN0 ]=-- Device (CHN0) { Name (_ADR, Zero) Method (_STA, 0, NotSerialized) { If (LEqual (SCC, One)) { Return (0x0F) } Else { Return (Zero) } } Method (_GTM, 0, NotSerialized) { FZHD () Return (GTM (PMPT, PMUE, PMUT, PSPT, PSUE, PSUT)) } Method (_STM, 3, NotSerialized) { } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (Zero) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (Zero) } } } aml://_SB_.PCI0.SATA.CHN1._STA aml://_SB_.PCI0.SATA.CHN1 --=[ _SB.PCI0.SATA.CHN1._STA ]=-- Method (_STA, 0, NotSerialized) { If (LEqual (SCC, One)) { Return (0x0F) } Else { Return (Zero) } } aml://_SB_.PCI0.SATA.CHN1._GTM aml://_SB_.PCI0.SATA.CHN1 --=[ _SB.PCI0.SATA.CHN1._GTM ]=-- Method (_GTM, 0, NotSerialized) { FZHD () Return (GTM (SMPT, SMUE, SMUT, SSPT, SSUE, SSUT)) } aml://_SB_.PCI0.SATA.CHN1._STM aml://_SB_.PCI0.SATA.CHN1 --=[ _SB.PCI0.SATA.CHN1._STM ]=-- Method (_STM, 3, NotSerialized) { } aml://_SB_.PCI0.SATA.CHN1.DRV0._GTF aml://_SB_.PCI0.SATA.CHN1.DRV0 --=[ _SB.PCI0.SATA.CHN1.DRV0._GTF ]=-- Method (_GTF, 0, NotSerialized) { Return (Zero) } aml://_SB_.PCI0.SATA.CHN1.DRV0 aml://_SB_.PCI0.SATA.CHN1 --=[ _SB.PCI0.SATA.CHN1.DRV0 ]=-- Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (Zero) } } aml://_SB_.PCI0.SATA.CHN1.DRV1._GTF aml://_SB_.PCI0.SATA.CHN1.DRV1 --=[ _SB.PCI0.SATA.CHN1.DRV1._GTF ]=-- Method (_GTF, 0, NotSerialized) { Return (Zero) } aml://_SB_.PCI0.SATA.CHN1.DRV1 aml://_SB_.PCI0.SATA.CHN1 --=[ _SB.PCI0.SATA.CHN1.DRV1 ]=-- Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (Zero) } } aml://_SB_.PCI0.SATA.CHN1 aml://_SB_.PCI0.SATA --=[ _SB.PCI0.SATA.CHN1 ]=-- Device (CHN1) { Name (_ADR, One) Method (_STA, 0, NotSerialized) { If (LEqual (SCC, One)) { Return (0x0F) } Else { Return (Zero) } } Method (_GTM, 0, NotSerialized) { FZHD () Return (GTM (SMPT, SMUE, SMUT, SSPT, SSUE, SSUT)) } Method (_STM, 3, NotSerialized) { } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (Zero) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (Zero) } } } aml://_SB_.PCI0.SATA.GTM aml://_SB_.PCI0.SATA --=[ _SB.PCI0.SATA.GTM ]=-- Method (GTM, 6, Serialized) { Store (Ones, PIO0) Store (Ones, PIO1) Store (Ones, DMA0) Store (Ones, DMA1) Store (0x10, CHNF) If (REGF) {} Else { Return (TMD0) } Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg0, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA0) Store (Local7, PIO0) Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg3, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA1) Store (Local7, PIO1) If (Arg1) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Arg2)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Local5)), DMA0) Or (CHNF, One, CHNF) } If (Arg4) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Arg5)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Local5)), DMA1) Or (CHNF, 0x04, CHNF) } Return (TMD0) } aml://_SB_.PCI0.SATA aml://_SB_.PCI0 --=[ _SB.PCI0.SATA ]=-- Device (SATA) { Name (_ADR, 0x000F0000) Name (REGF, One) Name (TIM0, Package (0x04) { Package (0x05) { 0x78, 0xB4, 0xF0, 0x017F, 0x0258 }, Package (0x05) { 0x20, 0x22, 0x33, 0x47, 0x5D }, Package (0x07) { 0x78, 0x50, 0x3C, 0x2D, 0x1E, 0x14, 0x0F }, Package (0x0F) { 0x06, 0x05, 0x04, 0x04, 0x03, 0x03, 0x02, 0x02, One, One, One, One, One, One, Zero } }) Name (TMD0, Buffer (0x14) {}) CreateDWordField (TMD0, Zero, PIO0) CreateDWordField (TMD0, 0x04, DMA0) CreateDWordField (TMD0, 0x08, PIO1) CreateDWordField (TMD0, 0x0C, DMA1) CreateDWordField (TMD0, 0x10, CHNF) Name (PMPT, 0x20) Name (PMUE, 0x07) Name (PMUT, Zero) Name (PSPT, 0x20) Name (PSUE, 0x07) Name (PSUT, Zero) Name (SMPT, 0x20) Name (SMUE, 0x07) Name (SMUT, Zero) Name (SSPT, 0x20) Name (SSUE, 0x07) Name (SSUT, Zero) OperationRegion (SAPR, PCI_Config, Zero, 0x3C) Field (SAPR, ByteAcc, NoLock, Preserve) { VID, 16, DID, 16, CMD, 3, Offset (0x0A), SCC, 8 } Method (_REG, 2, NotSerialized) { If (LEqual (Arg0, 0x02)) { Store (Arg1, REGF) } } Method (_STA, 0, NotSerialized) { If (LEqual (CMD, Zero)) { Return (0x0D) } Else { Return (0x0F) } } Device (CHN0) { Name (_ADR, Zero) Method (_STA, 0, NotSerialized) { If (LEqual (SCC, One)) { Return (0x0F) } Else { Return (Zero) } } Method (_GTM, 0, NotSerialized) { FZHD () Return (GTM (PMPT, PMUE, PMUT, PSPT, PSUE, PSUT)) } Method (_STM, 3, NotSerialized) { } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (Zero) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (Zero) } } } Device (CHN1) { Name (_ADR, One) Method (_STA, 0, NotSerialized) { If (LEqual (SCC, One)) { Return (0x0F) } Else { Return (Zero) } } Method (_GTM, 0, NotSerialized) { FZHD () Return (GTM (SMPT, SMUE, SMUT, SSPT, SSUE, SSUT)) } Method (_STM, 3, NotSerialized) { } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (Zero) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (Zero) } } } Method (GTM, 6, Serialized) { Store (Ones, PIO0) Store (Ones, PIO1) Store (Ones, DMA0) Store (Ones, DMA1) Store (0x10, CHNF) If (REGF) {} Else { Return (TMD0) } Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg0, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA0) Store (Local7, PIO0) Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg3, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA1) Store (Local7, PIO1) If (Arg1) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Arg2)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Local5)), DMA0) Or (CHNF, One, CHNF) } If (Arg4) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Arg5)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Local5)), DMA1) Or (CHNF, 0x04, CHNF) } Return (TMD0) } } aml://_SB_.PCI0.PATA._REG aml://_SB_.PCI0.PATA --=[ _SB.PCI0.PATA._REG ]=-- Method (_REG, 2, NotSerialized) { If (LEqual (Arg0, 0x02)) { Store (Arg1, REGF) } } aml://_SB_.PCI0.PATA.CHN0._GTM aml://_SB_.PCI0.PATA.CHN0 --=[ _SB.PCI0.PATA.CHN0._GTM ]=-- Method (_GTM, 0, NotSerialized) { FZHD () ShiftLeft (PSCR, One, Local1) Or (PMCR, Local1, Local0) Return (GTM (PMPT, PMUE, PMUT, PSPT, PSUE, PSUT, Local0)) } aml://_SB_.PCI0.PATA.CHN0._STM aml://_SB_.PCI0.PATA.CHN0 --=[ _SB.PCI0.PATA.CHN0._STM ]=-- Method (_STM, 3, NotSerialized) { Store (Arg0, Debug) Store (Arg0, TMD0) Store (PMPT, GMPT) Store (PMUE, GMUE) Store (PMUT, GMUT) Store (PMCR, GMCR) Store (PSPT, GSPT) Store (PSUE, GSUE) Store (PSUT, GSUT) Store (PSCR, GSCR) STM () Store (GMPT, PMPT) Store (GMUE, PMUE) Store (GMUT, PMUT) Store (GMCR, PMCR) Store (GSPT, PSPT) Store (GSUE, PSUE) Store (GSUT, PSUT) Store (GSCR, PSCR) Store (GTF (Zero, Arg1), ATA0) Store (GTF (One, Arg2), ATA1) } aml://_SB_.PCI0.PATA.CHN0.DRV0._GTF aml://_SB_.PCI0.PATA.CHN0.DRV0 --=[ _SB.PCI0.PATA.CHN0.DRV0._GTF ]=-- Method (_GTF, 0, NotSerialized) { Return (RATA (ATA0)) } aml://_SB_.PCI0.PATA.CHN0.DRV0 aml://_SB_.PCI0.PATA.CHN0 --=[ _SB.PCI0.PATA.CHN0.DRV0 ]=-- Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA0)) } } aml://_SB_.PCI0.PATA.CHN0.DRV1._GTF aml://_SB_.PCI0.PATA.CHN0.DRV1 --=[ _SB.PCI0.PATA.CHN0.DRV1._GTF ]=-- Method (_GTF, 0, NotSerialized) { Return (RATA (ATA1)) } aml://_SB_.PCI0.PATA.CHN0.DRV1 aml://_SB_.PCI0.PATA.CHN0 --=[ _SB.PCI0.PATA.CHN0.DRV1 ]=-- Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA1)) } } aml://_SB_.PCI0.PATA.CHN0 aml://_SB_.PCI0.PATA --=[ _SB.PCI0.PATA.CHN0 ]=-- Device (CHN0) { Name (_ADR, Zero) Method (_GTM, 0, NotSerialized) { FZHD () ShiftLeft (PSCR, One, Local1) Or (PMCR, Local1, Local0) Return (GTM (PMPT, PMUE, PMUT, PSPT, PSUE, PSUT, Local0)) } Method (_STM, 3, NotSerialized) { Store (Arg0, Debug) Store (Arg0, TMD0) Store (PMPT, GMPT) Store (PMUE, GMUE) Store (PMUT, GMUT) Store (PMCR, GMCR) Store (PSPT, GSPT) Store (PSUE, GSUE) Store (PSUT, GSUT) Store (PSCR, GSCR) STM () Store (GMPT, PMPT) Store (GMUE, PMUE) Store (GMUT, PMUT) Store (GMCR, PMCR) Store (GSPT, PSPT) Store (GSUE, PSUE) Store (GSUT, PSUT) Store (GSCR, PSCR) Store (GTF (Zero, Arg1), ATA0) Store (GTF (One, Arg2), ATA1) } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA0)) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA1)) } } } aml://_SB_.PCI0.PATA.CHN1._GTM aml://_SB_.PCI0.PATA.CHN1 --=[ _SB.PCI0.PATA.CHN1._GTM ]=-- Method (_GTM, 0, NotSerialized) { FZHD () ShiftLeft (SSCR, One, Local1) Or (SMCR, Local1, Local0) Return (GTM (SMPT, SMUE, SMUT, SSPT, SSUE, SSUT, Local0)) } aml://_SB_.PCI0.PATA.CHN1._STM aml://_SB_.PCI0.PATA.CHN1 --=[ _SB.PCI0.PATA.CHN1._STM ]=-- Method (_STM, 3, NotSerialized) { Store (Arg0, Debug) Store (Arg0, TMD0) Store (SMPT, GMPT) Store (SMUE, GMUE) Store (SMUT, GMUT) Store (SMCR, GMCR) Store (SSPT, GSPT) Store (SSUE, GSUE) Store (SSUT, GSUT) Store (SSCR, GSCR) STM () Store (GMPT, SMPT) Store (GMUE, SMUE) Store (GMUT, SMUT) Store (GMCR, SMCR) Store (GSPT, SSPT) Store (GSUE, SSUE) Store (GSUT, SSUT) Store (GSCR, SSCR) Store (GTF (Zero, Arg1), ATA2) Store (GTF (One, Arg2), ATA3) } aml://_SB_.PCI0.PATA.CHN1.DRV0._GTF aml://_SB_.PCI0.PATA.CHN1.DRV0 --=[ _SB.PCI0.PATA.CHN1.DRV0._GTF ]=-- Method (_GTF, 0, NotSerialized) { Return (RATA (ATA2)) } aml://_SB_.PCI0.PATA.CHN1.DRV0 aml://_SB_.PCI0.PATA.CHN1 --=[ _SB.PCI0.PATA.CHN1.DRV0 ]=-- Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA2)) } } aml://_SB_.PCI0.PATA.CHN1.DRV1._GTF aml://_SB_.PCI0.PATA.CHN1.DRV1 --=[ _SB.PCI0.PATA.CHN1.DRV1._GTF ]=-- Method (_GTF, 0, NotSerialized) { Return (RATA (ATA3)) } aml://_SB_.PCI0.PATA.CHN1.DRV1 aml://_SB_.PCI0.PATA.CHN1 --=[ _SB.PCI0.PATA.CHN1.DRV1 ]=-- Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA3)) } } aml://_SB_.PCI0.PATA.CHN1 aml://_SB_.PCI0.PATA --=[ _SB.PCI0.PATA.CHN1 ]=-- Device (CHN1) { Name (_ADR, One) Method (_GTM, 0, NotSerialized) { FZHD () ShiftLeft (SSCR, One, Local1) Or (SMCR, Local1, Local0) Return (GTM (SMPT, SMUE, SMUT, SSPT, SSUE, SSUT, Local0)) } Method (_STM, 3, NotSerialized) { Store (Arg0, Debug) Store (Arg0, TMD0) Store (SMPT, GMPT) Store (SMUE, GMUE) Store (SMUT, GMUT) Store (SMCR, GMCR) Store (SSPT, GSPT) Store (SSUE, GSUE) Store (SSUT, GSUT) Store (SSCR, GSCR) STM () Store (GMPT, SMPT) Store (GMUE, SMUE) Store (GMUT, SMUT) Store (GMCR, SMCR) Store (GSPT, SSPT) Store (GSUE, SSUE) Store (GSUT, SSUT) Store (GSCR, SSCR) Store (GTF (Zero, Arg1), ATA2) Store (GTF (One, Arg2), ATA3) } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA2)) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA3)) } } } aml://_SB_.PCI0.PATA.GTM aml://_SB_.PCI0.PATA --=[ _SB.PCI0.PATA.GTM ]=-- Method (GTM, 7, Serialized) { Store (Ones, PIO0) Store (Ones, PIO1) Store (Ones, DMA0) Store (Ones, DMA1) Store (0x10, CHNF) If (REGF) {} Else { Return (TMD0) } Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg0, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA0) Store (Local7, PIO0) Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg3, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA1) Store (Local7, PIO1) If (Arg1) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Arg2)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Local5)), DMA0) Or (CHNF, One, CHNF) } If (Arg4) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Arg5)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Local5)), DMA1) Or (CHNF, 0x04, CHNF) } Store (TMD0, Debug) Return (TMD0) } aml://_SB_.PCI0.PATA.STM aml://_SB_.PCI0.PATA --=[ _SB.PCI0.PATA.STM ]=-- Method (STM, 0, Serialized) { If (REGF) { Store (Zero, GMUE) Store (0x07, GMUT) Store (Zero, GSUE) Store (0x07, GSUT) If (And (CHNF, One)) { Store (Match (DerefOf (Index (TIM0, 0x03)), MLE, DMA0, MTR, Zero, Zero), Local0) If (LGreater (Local0, 0x06)) { Store (0x06, Local0) } Store (DerefOf (Index (DerefOf (Index (TIM0, 0x04)), Local0)), GMUT) Or (GMUE, 0x07, GMUE) } Else { If (Or (LEqual (PIO0, Ones), LEqual (PIO0, Zero))) { If (And (LLess (DMA0, Ones), LGreater (DMA0, Zero))) { Store (DMA0, PIO0) } } } If (And (CHNF, 0x04)) { Store (Match (DerefOf (Index (TIM0, 0x03)), MLE, DMA1, MTR, Zero, Zero), Local0) If (LGreater (Local0, 0x06)) { Store (0x06, Local0) } Store (DerefOf (Index (DerefOf (Index (TIM0, 0x04)), Local0)), GSUT) Or (GSUE, 0x07, GSUE) } Else { If (Or (LEqual (PIO1, Ones), LEqual (PIO1, Zero))) { If (And (LLess (DMA1, Ones), LGreater (DMA1, Zero))) { Store (DMA1, PIO1) } } } And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIO0, MTR, Zero, Zero), 0x07, Local0) Store (DerefOf (Index (DerefOf (Index (TIM0, One)), Local0)), Local1) Store (Local1, GMPT) And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIO1, MTR, Zero, Zero), 0x07, Local0) Store (DerefOf (Index (DerefOf (Index (TIM0, One)), Local0)), Local1) Store (Local1, GSPT) } } aml://_SB_.PCI0.PATA.GTFB aml://_SB_.PCI0.PATA --=[ _SB.PCI0.PATA.GTFB ]=-- Method (GTFB, 3, Serialized) { Multiply (CMDC, 0x38, Local0) Add (Local0, 0x08, Local1) CreateField (ATAB, Local1, 0x38, CMDX) Multiply (CMDC, 0x07, Local0) CreateByteField (ATAB, Add (Local0, 0x02), A001) CreateByteField (ATAB, Add (Local0, 0x06), A005) Store (Arg0, CMDX) Store (Arg1, A001) Store (Arg2, A005) Increment (CMDC) } aml://_SB_.PCI0.PATA.GTF aml://_SB_.PCI0.PATA --=[ _SB.PCI0.PATA.GTF ]=-- Method (GTF, 2, Serialized) { Store (Arg1, Debug) Store (Zero, CMDC) Name (ID49, 0x0C00) Name (ID59, Zero) Name (ID53, 0x04) Name (ID63, 0x0F00) Name (ID88, 0x0F00) Name (IRDY, One) Name (PIOT, Zero) Name (DMAT, Zero) If (LEqual (SizeOf (Arg1), 0x0200)) { CreateWordField (Arg1, 0x62, IW49) Store (IW49, ID49) CreateWordField (Arg1, 0x6A, IW53) Store (IW53, ID53) CreateWordField (Arg1, 0x7E, IW63) Store (IW63, ID63) CreateWordField (Arg1, 0x76, IW59) Store (IW59, ID59) CreateWordField (Arg1, 0xB0, IW88) Store (IW88, ID88) } Store (0xA0, Local7) If (Arg0) { Store (0xB0, Local7) And (CHNF, 0x08, IRDY) If (And (CHNF, 0x10)) { Store (PIO1, PIOT) } Else { Store (PIO0, PIOT) } If (And (CHNF, 0x04)) { If (And (CHNF, 0x10)) { Store (DMA1, DMAT) } Else { Store (DMA0, DMAT) } } } Else { And (CHNF, 0x02, IRDY) Store (PIO0, PIOT) If (And (CHNF, One)) { Store (DMA0, DMAT) } } If (LAnd (LAnd (And (ID53, 0x04), And (ID88, 0xFF00 )), DMAT)) { Store (Match (DerefOf (Index (TIM0, 0x03)), MLE, DMAT, MTR, Zero, Zero), Local1) If (LGreater (Local1, 0x06)) { Store (0x06, Local1) } GTFB (AT01, Or (0x40, Local1), Local7) } Else { If (LAnd (And (ID63, 0xFF00), PIOT)) { And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIOT, MTR, Zero, Zero), 0x03, Local0) Or (0x20, DerefOf (Index (DerefOf (Index (TIM0, 0x07)), Local0 )), Local1) GTFB (AT01, Local1, Local7) } } If (IRDY) { And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIOT, MTR, Zero, Zero), 0x07, Local0) Or (0x08, DerefOf (Index (DerefOf (Index (TIM0, 0x06)), Local0 )), Local1) GTFB (AT01, Local1, Local7) } Else { If (And (ID49, 0x0400)) { GTFB (AT01, One, Local7) } } If (LAnd (And (ID59, 0x0100), And (ID59, 0xFF))) { GTFB (AT03, And (ID59, 0xFF), Local7) } Store (ATAB, Debug) Return (ATAB) } aml://_SB_.PCI0.PATA.RATA aml://_SB_.PCI0.PATA --=[ _SB.PCI0.PATA.RATA ]=-- Method (RATA, 1, NotSerialized) { CreateByteField (Arg0, Zero, CMDN) Multiply (CMDN, 0x38, Local0) CreateField (Arg0, 0x08, Local0, RETB) Store (RETB, Debug) Return (RETB) } aml://_SB_.PCI0.PATA aml://_SB_.PCI0 --=[ _SB.PCI0.PATA ]=-- Device (PATA) { Name (_ADR, 0x000F0001) Name (REGF, One) Method (_REG, 2, NotSerialized) { If (LEqual (Arg0, 0x02)) { Store (Arg1, REGF) } } Name (TIM0, Package (0x08) { Package (0x05) { 0x3C, 0x78, 0xB4, 0xF0, 0x0384 }, Package (0x05) { 0x11, 0x20, 0x31, 0x65, 0xA8 }, Package (0x10) { 0x06, 0x05, 0x04, 0x04, 0x03, 0x03, 0x02, 0x02, One, One, One, One, One, One, Zero, Zero }, Package (0x07) { 0x78, 0x5A, 0x3C, 0x2D, 0x1E, 0x14, 0x0F }, Package (0x07) { 0x0E, 0x08, 0x06, 0x04, 0x02, One, Zero }, Package (0x07) { Zero, Zero, Zero, One, One, One, One }, Package (0x05) { 0x05, 0x04, 0x03, 0x02, Zero }, Package (0x04) { 0x02, One, Zero, Zero } }) Name (TMD0, Buffer (0x14) {}) CreateDWordField (TMD0, Zero, PIO0) CreateDWordField (TMD0, 0x04, DMA0) CreateDWordField (TMD0, 0x08, PIO1) CreateDWordField (TMD0, 0x0C, DMA1) CreateDWordField (TMD0, 0x10, CHNF) OperationRegion (CFG2, PCI_Config, 0x40, 0x20) Field (CFG2, DWordAcc, NoLock, Preserve) { Offset (0x08), SSPT, 8, SMPT, 8, PSPT, 8, PMPT, 8, Offset (0x10), SSUT, 4, SSCR, 1, SSUE, 3, SMUT, 4, SMCR, 1, SMUE, 3, PSUT, 4, PSCR, 1, PSUE, 3, PMUT, 4, PMCR, 1, PMUE, 3 } Name (GMPT, Zero) Name (GMUE, Zero) Name (GMUT, Zero) Name (GMCR, Zero) Name (GSPT, Zero) Name (GSUE, Zero) Name (GSUT, Zero) Name (GSCR, Zero) Device (CHN0) { Name (_ADR, Zero) Method (_GTM, 0, NotSerialized) { FZHD () ShiftLeft (PSCR, One, Local1) Or (PMCR, Local1, Local0) Return (GTM (PMPT, PMUE, PMUT, PSPT, PSUE, PSUT, Local0)) } Method (_STM, 3, NotSerialized) { Store (Arg0, Debug) Store (Arg0, TMD0) Store (PMPT, GMPT) Store (PMUE, GMUE) Store (PMUT, GMUT) Store (PMCR, GMCR) Store (PSPT, GSPT) Store (PSUE, GSUE) Store (PSUT, GSUT) Store (PSCR, GSCR) STM () Store (GMPT, PMPT) Store (GMUE, PMUE) Store (GMUT, PMUT) Store (GMCR, PMCR) Store (GSPT, PSPT) Store (GSUE, PSUE) Store (GSUT, PSUT) Store (GSCR, PSCR) Store (GTF (Zero, Arg1), ATA0) Store (GTF (One, Arg2), ATA1) } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA0)) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA1)) } } } Device (CHN1) { Name (_ADR, One) Method (_GTM, 0, NotSerialized) { FZHD () ShiftLeft (SSCR, One, Local1) Or (SMCR, Local1, Local0) Return (GTM (SMPT, SMUE, SMUT, SSPT, SSUE, SSUT, Local0)) } Method (_STM, 3, NotSerialized) { Store (Arg0, Debug) Store (Arg0, TMD0) Store (SMPT, GMPT) Store (SMUE, GMUE) Store (SMUT, GMUT) Store (SMCR, GMCR) Store (SSPT, GSPT) Store (SSUE, GSUE) Store (SSUT, GSUT) Store (SSCR, GSCR) STM () Store (GMPT, SMPT) Store (GMUE, SMUE) Store (GMUT, SMUT) Store (GMCR, SMCR) Store (GSPT, SSPT) Store (GSUE, SSUE) Store (GSUT, SSUT) Store (GSCR, SSCR) Store (GTF (Zero, Arg1), ATA2) Store (GTF (One, Arg2), ATA3) } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA2)) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA3)) } } } Method (GTM, 7, Serialized) { Store (Ones, PIO0) Store (Ones, PIO1) Store (Ones, DMA0) Store (Ones, DMA1) Store (0x10, CHNF) If (REGF) {} Else { Return (TMD0) } Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg0, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA0) Store (Local7, PIO0) Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg3, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA1) Store (Local7, PIO1) If (Arg1) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Arg2)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Local5)), DMA0) Or (CHNF, One, CHNF) } If (Arg4) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Arg5)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Local5)), DMA1) Or (CHNF, 0x04, CHNF) } Store (TMD0, Debug) Return (TMD0) } Method (STM, 0, Serialized) { If (REGF) { Store (Zero, GMUE) Store (0x07, GMUT) Store (Zero, GSUE) Store (0x07, GSUT) If (And (CHNF, One)) { Store (Match (DerefOf (Index (TIM0, 0x03)), MLE, DMA0, MTR, Zero, Zero), Local0) If (LGreater (Local0, 0x06)) { Store (0x06, Local0) } Store (DerefOf (Index (DerefOf (Index (TIM0, 0x04)), Local0)), GMUT) Or (GMUE, 0x07, GMUE) } Else { If (Or (LEqual (PIO0, Ones), LEqual (PIO0, Zero))) { If (And (LLess (DMA0, Ones), LGreater (DMA0, Zero))) { Store (DMA0, PIO0) } } } If (And (CHNF, 0x04)) { Store (Match (DerefOf (Index (TIM0, 0x03)), MLE, DMA1, MTR, Zero, Zero), Local0) If (LGreater (Local0, 0x06)) { Store (0x06, Local0) } Store (DerefOf (Index (DerefOf (Index (TIM0, 0x04)), Local0)), GSUT) Or (GSUE, 0x07, GSUE) } Else { If (Or (LEqual (PIO1, Ones), LEqual (PIO1, Zero))) { If (And (LLess (DMA1, Ones), LGreater (DMA1, Zero))) { Store (DMA1, PIO1) } } } And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIO0, MTR, Zero, Zero), 0x07, Local0) Store (DerefOf (Index (DerefOf (Index (TIM0, One)), Local0)), Local1) Store (Local1, GMPT) And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIO1, MTR, Zero, Zero), 0x07, Local0) Store (DerefOf (Index (DerefOf (Index (TIM0, One)), Local0)), Local1) Store (Local1, GSPT) } } Name (AT01, Buffer (0x07) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEF }) Name (AT02, Buffer (0x07) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90 }) Name (AT03, Buffer (0x07) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6 }) Name (AT04, Buffer (0x07) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x91 }) Name (ATA0, Buffer (0x1D) {}) Name (ATA1, Buffer (0x1D) {}) Name (ATA2, Buffer (0x1D) {}) Name (ATA3, Buffer (0x1D) {}) Name (ATAB, Buffer (0x1D) {}) CreateByteField (ATAB, Zero, CMDC) Method (GTFB, 3, Serialized) { Multiply (CMDC, 0x38, Local0) Add (Local0, 0x08, Local1) CreateField (ATAB, Local1, 0x38, CMDX) Multiply (CMDC, 0x07, Local0) CreateByteField (ATAB, Add (Local0, 0x02), A001) CreateByteField (ATAB, Add (Local0, 0x06), A005) Store (Arg0, CMDX) Store (Arg1, A001) Store (Arg2, A005) Increment (CMDC) } Method (GTF, 2, Serialized) { Store (Arg1, Debug) Store (Zero, CMDC) Name (ID49, 0x0C00) Name (ID59, Zero) Name (ID53, 0x04) Name (ID63, 0x0F00) Name (ID88, 0x0F00) Name (IRDY, One) Name (PIOT, Zero) Name (DMAT, Zero) If (LEqual (SizeOf (Arg1), 0x0200)) { CreateWordField (Arg1, 0x62, IW49) Store (IW49, ID49) CreateWordField (Arg1, 0x6A, IW53) Store (IW53, ID53) CreateWordField (Arg1, 0x7E, IW63) Store (IW63, ID63) CreateWordField (Arg1, 0x76, IW59) Store (IW59, ID59) CreateWordField (Arg1, 0xB0, IW88) Store (IW88, ID88) } Store (0xA0, Local7) If (Arg0) { Store (0xB0, Local7) And (CHNF, 0x08, IRDY) If (And (CHNF, 0x10)) { Store (PIO1, PIOT) } Else { Store (PIO0, PIOT) } If (And (CHNF, 0x04)) { If (And (CHNF, 0x10)) { Store (DMA1, DMAT) } Else { Store (DMA0, DMAT) } } } Else { And (CHNF, 0x02, IRDY) Store (PIO0, PIOT) If (And (CHNF, One)) { Store (DMA0, DMAT) } } If (LAnd (LAnd (And (ID53, 0x04), And (ID88, 0xFF00 )), DMAT)) { Store (Match (DerefOf (Index (TIM0, 0x03)), MLE, DMAT, MTR, Zero, Zero), Local1) If (LGreater (Local1, 0x06)) { Store (0x06, Local1) } GTFB (AT01, Or (0x40, Local1), Local7) } Else { If (LAnd (And (ID63, 0xFF00), PIOT)) { And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIOT, MTR, Zero, Zero), 0x03, Local0) Or (0x20, DerefOf (Index (DerefOf (Index (TIM0, 0x07)), Local0 )), Local1) GTFB (AT01, Local1, Local7) } } If (IRDY) { And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIOT, MTR, Zero, Zero), 0x07, Local0) Or (0x08, DerefOf (Index (DerefOf (Index (TIM0, 0x06)), Local0 )), Local1) GTFB (AT01, Local1, Local7) } Else { If (And (ID49, 0x0400)) { GTFB (AT01, One, Local7) } } If (LAnd (And (ID59, 0x0100), And (ID59, 0xFF))) { GTFB (AT03, And (ID59, 0xFF), Local7) } Store (ATAB, Debug) Return (ATAB) } Method (RATA, 1, NotSerialized) { CreateByteField (Arg0, Zero, CMDN) Multiply (CMDN, 0x38, Local0) CreateField (Arg0, 0x08, Local0, RETB) Store (RETB, Debug) Return (RETB) } } aml://_SB_.PCI0.SBRG.SPTS aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.SPTS ]=-- Method (SPTS, 1, NotSerialized) { If (LAnd (LEqual (Arg0, 0x04), LEqual (OSFL (), 0x02))) { Sleep (0x0BB8) } If (LEqual (Arg0, One)) { While (WAKS) { Stall (0x50) Store (One, WAKS) } While (LNotEqual (PADS, Zero)) { Store (PADS, PADS) } Store (One, IRQR) Store (One, SUST) } If (LEqual (Arg0, 0x03)) { Store (Zero, SUST) } Store (One, SLPS) While (SLES) { Stall (0x50) Store (One, SLES) } Store (One, SLEE) } aml://_SB_.PCI0.SBRG.SWAK aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.SWAK ]=-- Method (SWAK, 1, NotSerialized) { If (LAnd (LEqual (Arg0, 0x03), PM5D)) {} Else { If (LAnd (LEqual (Arg0, One), PM5D)) {} Else { Notify (PWRB, 0x02) } } Store (Zero, PM5D) Store (One, PWBT) Store (Zero, SLEE) Store (Zero, ^^USB1.U184) Store (Zero, ^^USB2.U284) Store (Zero, ^^USB3.U384) Store (Zero, ^^USB4.U484) Store (Zero, ^^EHCI.U584) Store (Zero, SLPS) } aml://\_SB_.SLPB._STA aml://\_SB_.SLPB --=[ \_SB.SLPB._STA ]=-- Method (_STA, 0, NotSerialized) { If (LNotEqual (SUSW, 0xFF)) { Return (0x0F) } Return (Zero) } aml://\_SB_.SLPB.SBEV aml://\_SB_.SLPB --=[ \_SB.SLPB.SBEV ]=-- Method (SBEV, 0, NotSerialized) { If (SLPS) { Notify (SLPB, 0x02) } Else { Notify (SLPB, 0x80) } } aml://\_SB_.SLPB.\_GPE._L04 aml://\_SB_.SLPB.\_GPE --=[ \_SB.SLPB.\_GPE._L04 ]=-- Method (\_GPE._L04, 0, NotSerialized) { \_SB.SLPB.SBEV () } aml://\_SB_.SLPB._PRW aml://\_SB_.SLPB --=[ \_SB.SLPB._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (Package (0x02) { 0x04, 0x04 }) } aml://\_SB_.SLPB aml://\_SB_ --=[ \_SB.SLPB ]=-- Device (SLPB) { Name (_HID, EisaId ("PNP0C0E")) Method (_STA, 0, NotSerialized) { If (LNotEqual (SUSW, 0xFF)) { Return (0x0F) } Return (Zero) } Method (SBEV, 0, NotSerialized) { If (SLPS) { Notify (SLPB, 0x02) } Else { Notify (SLPB, 0x80) } } Method (\_GPE._L04, 0, NotSerialized) { \_SB.SLPB.SBEV () } Method (_PRW, 0, NotSerialized) { Return (Package (0x02) { 0x04, 0x04 }) } } aml://\_SB --=[ \_SB ]=-- Scope (\_SB) { Name (SLPS, Zero) Device (SLPB) { Name (_HID, EisaId ("PNP0C0E")) Method (_STA, 0, NotSerialized) { If (LNotEqual (SUSW, 0xFF)) { Return (0x0F) } Return (Zero) } Method (SBEV, 0, NotSerialized) { If (SLPS) { Notify (SLPB, 0x02) } Else { Notify (SLPB, 0x80) } } Method (\_GPE._L04, 0, NotSerialized) { \_SB.SLPB.SBEV () } Method (_PRW, 0, NotSerialized) { Return (Package (0x02) { 0x04, 0x04 }) } } } aml://_SB_.PCI0.SBRG.PIC aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.PIC ]=-- Device (PIC) { Name (_HID, EisaId ("PNP0000")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x00, // Alignment 0x02, // Length ) IRQNoFlags () {2} }) } aml://_SB_.PCI0.SBRG.DMAD aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.DMAD ]=-- Device (DMAD) { Name (_HID, EisaId ("PNP0200")) Name (_CRS, ResourceTemplate () { DMA (Compatibility, BusMaster, Transfer8, ) {4} IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0087, // Range Minimum 0x0087, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0089, // Range Minimum 0x0089, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x008F, // Range Minimum 0x008F, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x00, // Alignment 0x20, // Length ) }) } aml://_SB_.PCI0.SBRG.SPKR aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.SPKR ]=-- Device (SPKR) { Name (_HID, EisaId ("PNP0800")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x00, // Alignment 0x01, // Length ) }) } aml://_SB_.PCI0.SBRG.COPR aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.COPR ]=-- Device (COPR) { Name (_HID, EisaId ("PNP0C04")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x00, // Alignment 0x10, // Length ) IRQNoFlags () {13} }) } aml://_SB_.PCI0.SBRG.FDC_._FDE aml://_SB_.PCI0.SBRG.FDC_ --=[ _SB.PCI0.SBRG.FDC._FDE ]=-- Method (_FDE, 0, NotSerialized) { Name (FDEP, Package (0x05) { Zero, Zero, 0x02, 0x02, 0x02 }) If (_STA ()) { Store (One, Index (FDEP, Zero)) } Return (FDEP) } aml://_SB_.PCI0.SBRG.FDC_._STA aml://_SB_.PCI0.SBRG.FDC_ --=[ _SB.PCI0.SBRG.FDC._STA ]=-- Method (_STA, 0, NotSerialized) { Return (DSTA (0x03)) } aml://_SB_.PCI0.SBRG.FDC_._DIS aml://_SB_.PCI0.SBRG.FDC_ --=[ _SB.PCI0.SBRG.FDC._DIS ]=-- Method (_DIS, 0, NotSerialized) { DCNT (0x03, Zero) } aml://_SB_.PCI0.SBRG.FDC_._CRS aml://_SB_.PCI0.SBRG.FDC_ --=[ _SB.PCI0.SBRG.FDC._CRS ]=-- Method (_CRS, 0, NotSerialized) { DCRS (0x03, One) Store (IRQM, IRQE) Store (DMAM, DMAE) Store (IO11, IO21) Store (IO12, IO22) Store (0x06, LEN2) Add (IO21, 0x07, IO31) Store (IO31, IO32) Store (One, LEN3) Return (CRS2) } aml://_SB_.PCI0.SBRG.FDC_._SRS aml://_SB_.PCI0.SBRG.FDC_ --=[ _SB.PCI0.SBRG.FDC._SRS ]=-- Method (_SRS, 1, NotSerialized) { DSRS (Arg0, 0x03) CreateWordField (Arg0, 0x11, IRQE) CreateByteField (Arg0, 0x14, DMAE) ENFG (CGLD (0x03)) If (IRQE) { FindSetRightBit (IRQE, Local0) Subtract (Local0, One, INTR) } Else { Store (Zero, INTR) } If (DMAE) { FindSetRightBit (DMAE, Local0) Subtract (Local0, One, DMCH) } Else { Store (0x04, DMCH) } EXFG () } aml://_SB_.PCI0.SBRG.FDC aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.FDC ]=-- Device (FDC) { Name (_HID, EisaId ("PNP0700")) Method (_FDE, 0, NotSerialized) { Name (FDEP, Package (0x05) { Zero, Zero, 0x02, 0x02, 0x02 }) If (_STA ()) { Store (One, Index (FDEP, Zero)) } Return (FDEP) } Method (_STA, 0, NotSerialized) { Return (DSTA (0x03)) } Method (_DIS, 0, NotSerialized) { DCNT (0x03, Zero) } Method (_CRS, 0, NotSerialized) { DCRS (0x03, One) Store (IRQM, IRQE) Store (DMAM, DMAE) Store (IO11, IO21) Store (IO12, IO22) Store (0x06, LEN2) Add (IO21, 0x07, IO31) Store (IO31, IO32) Store (One, LEN3) Return (CRS2) } Method (_SRS, 1, NotSerialized) { DSRS (Arg0, 0x03) CreateWordField (Arg0, 0x11, IRQE) CreateByteField (Arg0, 0x14, DMAE) ENFG (CGLD (0x03)) If (IRQE) { FindSetRightBit (IRQE, Local0) Subtract (Local0, One, INTR) } Else { Store (Zero, INTR) } If (DMAE) { FindSetRightBit (DMAE, Local0) Subtract (Local0, One, DMCH) } Else { Store (0x04, DMCH) } EXFG () } Name (_PRS, ResourceTemplate () { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x03F0, // Range Minimum 0x03F0, // Range Maximum 0x01, // Alignment 0x06, // Length ) IO (Decode16, 0x03F7, // Range Minimum 0x03F7, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {6} DMA (Compatibility, NotBusMaster, Transfer8, ) {2} } StartDependentFnNoPri () { IO (Decode16, 0x03F0, // Range Minimum 0x03F0, // Range Maximum 0x01, // Alignment 0x06, // Length ) IO (Decode16, 0x03F7, // Range Minimum 0x03F7, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x0370, // Range Minimum 0x0370, // Range Maximum 0x01, // Alignment 0x06, // Length ) IO (Decode16, 0x0377, // Range Minimum 0x0377, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } EndDependentFn () }) } aml://_SB_.PCI0.SBRG.LPTE._HID aml://_SB_.PCI0.SBRG.LPTE --=[ _SB.PCI0.SBRG.LPTE._HID ]=-- Method (_HID, 0, NotSerialized) { If (LPTM (0x02)) { Return (0x0104D041) } Else { Return (0x0004D041) } } aml://_SB_.PCI0.SBRG.LPTE._STA aml://_SB_.PCI0.SBRG.LPTE --=[ _SB.PCI0.SBRG.LPTE._STA ]=-- Method (_STA, 0, NotSerialized) { Return (DSTA (0x02)) } aml://_SB_.PCI0.SBRG.LPTE._DIS aml://_SB_.PCI0.SBRG.LPTE --=[ _SB.PCI0.SBRG.LPTE._DIS ]=-- Method (_DIS, 0, NotSerialized) { DCNT (0x02, Zero) } aml://_SB_.PCI0.SBRG.LPTE._CRS aml://_SB_.PCI0.SBRG.LPTE --=[ _SB.PCI0.SBRG.LPTE._CRS ]=-- Method (_CRS, 0, NotSerialized) { DCRS (0x02, One) If (LPTM (0x02)) { Store (IRQM, IRQE) Store (DMAM, DMAE) Store (IO11, IO21) Store (IO12, IO22) Store (LEN1, LEN2) Add (IO21, 0x0400, IO31) Store (IO31, IO32) Store (LEN2, LEN3) Return (CRS2) } Else { Return (CRS1) } } aml://_SB_.PCI0.SBRG.LPTE._SRS aml://_SB_.PCI0.SBRG.LPTE --=[ _SB.PCI0.SBRG.LPTE._SRS ]=-- Method (_SRS, 1, NotSerialized) { DSRS (Arg0, 0x02) } aml://_SB_.PCI0.SBRG.LPTE._PRS aml://_SB_.PCI0.SBRG.LPTE --=[ _SB.PCI0.SBRG.LPTE._PRS ]=-- Method (_PRS, 0, NotSerialized) { If (LPTM (0x02)) { Return (EPPR) } Else { Return (LPPR) } } aml://_SB_.PCI0.SBRG.LPTE aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.LPTE ]=-- Device (LPTE) { Method (_HID, 0, NotSerialized) { If (LPTM (0x02)) { Return (0x0104D041) } Else { Return (0x0004D041) } } Method (_STA, 0, NotSerialized) { Return (DSTA (0x02)) } Method (_DIS, 0, NotSerialized) { DCNT (0x02, Zero) } Method (_CRS, 0, NotSerialized) { DCRS (0x02, One) If (LPTM (0x02)) { Store (IRQM, IRQE) Store (DMAM, DMAE) Store (IO11, IO21) Store (IO12, IO22) Store (LEN1, LEN2) Add (IO21, 0x0400, IO31) Store (IO31, IO32) Store (LEN2, LEN3) Return (CRS2) } Else { Return (CRS1) } } Method (_SRS, 1, NotSerialized) { DSRS (Arg0, 0x02) } Method (_PRS, 0, NotSerialized) { If (LPTM (0x02)) { Return (EPPR) } Else { Return (LPPR) } } Name (LPPR, ResourceTemplate () { StartDependentFnNoPri () { IO (Decode16, 0x0378, // Range Minimum 0x0378, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x0278, // Range Minimum 0x0278, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03BC, // Range Minimum 0x03BC, // Range Maximum 0x01, // Alignment 0x04, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } EndDependentFn () }) Name (EPPR, ResourceTemplate () { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x0378, // Range Minimum 0x0378, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0778, // Range Minimum 0x0778, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {7} DMA (Compatibility, NotBusMaster, Transfer8, ) {3} } StartDependentFnNoPri () { IO (Decode16, 0x0378, // Range Minimum 0x0378, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0778, // Range Minimum 0x0778, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x0278, // Range Minimum 0x0278, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0678, // Range Minimum 0x0678, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x03BC, // Range Minimum 0x03BC, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x07BC, // Range Minimum 0x07BC, // Range Maximum 0x01, // Alignment 0x04, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } EndDependentFn () }) } aml://_SB_.PCI0.SBRG.SIOR._UID aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR._UID ]=-- Method (_UID, 0, NotSerialized) { Return (SPIO) } aml://_SB_.PCI0.SBRG.SIOR._CRS aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR._CRS ]=-- Method (_CRS, 0, NotSerialized) { If (LAnd (LNotEqual (SPIO, 0x03F0), LGreater (SPIO, 0xF0))) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MIN, GP10) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MAX, GP11) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._LEN, GPL1) Store (SPIO, GP10) Store (SPIO, GP11) Store (0x02, GPL1) } If (IOPB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MIN, GP20) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MAX, GP21) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._LEN, GPL2) Store (IOPB, GP20) Store (IOPB, GP21) Store (IOPL, GPL2) } If (IOEB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MIN, GP30) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MAX, GP31) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._LEN, GPL3) Store (IOEB, GP30) Store (IOEB, GP31) Store (IOEL, GPL3) } If (IOGB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._MIN, GP40) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._MAX, GP41) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._LEN, GPL4) Store (IOGB, GP40) Store (IOGB, GP41) Store (IOGL, GPL4) } If (IODB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._MIN, GP50) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._MAX, GP51) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._LEN, GPL5) Store (IODB, GP50) Store (IODB, GP51) Store (IODL, GPL5) } Return (CRS) } aml://_SB_.PCI0.SBRG.SIOR aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.SIOR ]=-- Device (SIOR) { Name (_HID, EisaId ("PNP0C02")) Method (_UID, 0, NotSerialized) { Return (SPIO) } Name (CRS, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y00) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y01) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y02) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y03) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y04) }) Method (_CRS, 0, NotSerialized) { If (LAnd (LNotEqual (SPIO, 0x03F0), LGreater (SPIO, 0xF0))) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MIN, GP10) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MAX, GP11) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._LEN, GPL1) Store (SPIO, GP10) Store (SPIO, GP11) Store (0x02, GPL1) } If (IOPB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MIN, GP20) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MAX, GP21) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._LEN, GPL2) Store (IOPB, GP20) Store (IOPB, GP21) Store (IOPL, GPL2) } If (IOEB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MIN, GP30) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MAX, GP31) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._LEN, GPL3) Store (IOEB, GP30) Store (IOEB, GP31) Store (IOEL, GPL3) } If (IOGB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._MIN, GP40) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._MAX, GP41) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._LEN, GPL4) Store (IOGB, GP40) Store (IOGB, GP41) Store (IOGL, GPL4) } If (IODB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._MIN, GP50) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._MAX, GP51) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._LEN, GPL5) Store (IODB, GP50) Store (IODB, GP51) Store (IODL, GPL5) } Return (CRS) } } aml://_SB_.PCI0.SBRG.ENFG aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.ENFG ]=-- Method (ENFG, 1, NotSerialized) { Store (Zero, Local1) If (LEqual (SPIO, 0x2E)) { Store (Zero, Local1) } If (LEqual (SPIO, 0x4E)) { Store (One, Local1) } Store (Zero, Local0) While (LNotEqual (Local0, 0x04)) { Store (DerefOf (Index (DerefOf (Index (IKEY, Local1)), Local0)), INDX) Increment (Local0) } Store (Arg0, LDN) } aml://_SB_.PCI0.SBRG.ENTR aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.ENTR ]=-- Method (ENTR, 0, NotSerialized) { Store (0x87, INDX) Store (One, INDX) Store (0x55, INDX) If (LEqual (SPIO, 0x2E)) { Store (0x55, INDX) } Else { Store (0xAA, INDX) } } aml://_SB_.PCI0.SBRG.EXFG aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.EXFG ]=-- Method (EXFG, 0, NotSerialized) { Store (0x02, INDX) Store (0x02, DATA) } aml://_SB_.PCI0.SBRG.LPTM aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.LPTM ]=-- Method (LPTM, 1, NotSerialized) { ENFG (CGLD (Arg0)) And (OPT0, 0x02, Local0) EXFG () Return (Local0) } aml://_SB_.PCI0.SBRG.UHID aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.UHID ]=-- Method (UHID, 1, NotSerialized) { ENFG (CGLD (Arg0)) And (OPT0, 0x70, Local0) EXFG () If (Local0) { Return (0x1005D041) } Return (0x0105D041) } aml://_SB_.PCI0.SBRG.ORF0 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.ORF0 ]=-- Method (ORF0, 1, NotSerialized) { ENTR () Or (OPT0, Arg0, OPT0) EXFG () } aml://_SB_.PCI0.SBRG.ORF1 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.ORF1 ]=-- Method (ORF1, 1, NotSerialized) { ENTR () Or (OPT1, Arg0, OPT1) EXFG () } aml://_SB_.PCI0.SBRG.ORF2 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.ORF2 ]=-- Method (ORF2, 1, NotSerialized) { ENTR () Or (OPT2, Arg0, OPT2) EXFG () } aml://_SB_.PCI0.SBRG.ANF0 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.ANF0 ]=-- Method (ANF0, 1, NotSerialized) { ENTR () And (OPT0, Arg0, OPT0) EXFG () } aml://_SB_.PCI0.SBRG.ANF2 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.ANF2 ]=-- Method (ANF2, 1, NotSerialized) { ENTR () And (OPT2, Arg0, OPT2) EXFG () } aml://_SB_.PCI0.SBRG.ANF4 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.ANF4 ]=-- Method (ANF4, 1, NotSerialized) { ENTR () And (OPT4, Arg0, OPT4) EXFG () } aml://_SB_.PCI0.SBRG.STF0 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.STF0 ]=-- Method (STF0, 1, NotSerialized) { ENTR () Store (Arg0, OPT0) EXFG () } aml://_SB_.PCI0.SBRG.STF1 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.STF1 ]=-- Method (STF1, 1, NotSerialized) { ENTR () Store (Arg0, OPT1) EXFG () } aml://_SB_.PCI0.SBRG.SIOS aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.SIOS ]=-- Method (SIOS, 1, NotSerialized) { Store ("SIOS", Debug) Store (Zero, GP10) If (LLess (Arg0, 0x05)) { ENFG (0x04) Store (One, ACTR) EXFG () ANF4 (0xFC) ORF1 (0x18) If (KBFG) { ORF0 (0x08) } Else { ANF0 (0xF7) } If (MSFG) { ORF0 (0x10) } Else { ANF0 (0xEF) ENFG (0x06) Store (Zero, ACTR) EXFG () } ENFG (0x04) ANF2 (0xF0) ENFG (0x07) And (OPF9, 0xFE, OPF9) And (OPC0, 0xFE, OPC0) And (OPC3, 0xFE, OPC3) And (OP29, 0xEF, OP29) EXFG () } Else { ENFG (0x07) And (OPC0, Zero, OPC0) Or (OPC0, One, OPC0) And (OPC3, Zero, OPC3) Or (OPC3, One, OPC3) Or (OPF9, One, OPF9) And (OP29, 0xEF, OP29) EXFG () } } aml://_SB_.PCI0.SBRG.SIOW aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.SIOW ]=-- Method (SIOW, 1, NotSerialized) { Store (One, GP10) Store (One, GP40) Store ("SIOW", Debug) ENFG (0x04) Store (Zero, ACTR) EXFG () STF0 (Zero) STF1 (0xFF) ENFG (0x07) Or (OP29, 0x10, OP29) Or (OPC0, One, OPC0) Or (OPC3, One, OPC3) EXFG () ENFG (0x05) Or (ACTR, One, ACTR) EXFG () ENFG (0x06) Or (ACTR, One, ACTR) EXFG () ENFG (0x04) Store (One, ACTR) EXFG () } aml://_SB_.PCI0.SBRG.SIOH aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.SIOH ]=-- Method (SIOH, 0, NotSerialized) { Store ("SIOH", Debug) } aml://_SB_.PCI0.SBRG.CGLD aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.CGLD ]=-- Method (CGLD, 1, NotSerialized) { Return (DerefOf (Index (DCAT, Arg0))) } aml://_SB_.PCI0.SBRG.DSTA aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.DSTA ]=-- Method (DSTA, 1, NotSerialized) { ENFG (CGLD (Arg0)) Store (ACTR, Local0) EXFG () If (LEqual (Local0, 0xFF)) { Return (Zero) } And (Local0, One, Local0) Or (IOST, ShiftLeft (Local0, Arg0), IOST) If (Local0) { Return (0x0F) } Else { If (And (ShiftLeft (One, Arg0), IOST)) { Return (0x0D) } Else { Return (Zero) } } } aml://_SB_.PCI0.SBRG.DCNT aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.DCNT ]=-- Method (DCNT, 2, NotSerialized) { ENFG (CGLD (Arg0)) ShiftLeft (IOAH, 0x08, Local1) Or (IOAL, Local1, Local1) RRIO (Arg0, Arg1, Local1, 0x08) If (LAnd (LLess (DMCH, 0x04), LNotEqual (And (DMCH, 0x03, Local1), Zero))) { RDMA (Arg0, Arg1, Increment (Local1)) } Store (Arg1, ACTR) EXFG () } aml://_SB_.PCI0.SBRG.DCRS aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.DCRS ]=-- Method (DCRS, 2, NotSerialized) { ENFG (CGLD (Arg0)) ShiftLeft (IOAH, 0x08, IO11) Or (IOAL, IO11, IO11) Store (IO11, IO12) Subtract (FindSetRightBit (IO11), One, Local0) ShiftLeft (One, Local0, LEN1) If (INTR) { ShiftLeft (One, INTR, IRQM) } Else { Store (Zero, IRQM) } If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero))) { Store (Zero, DMAM) } Else { And (DMCH, 0x03, Local1) ShiftLeft (One, Local1, DMAM) } EXFG () Return (CRS1) } aml://_SB_.PCI0.SBRG.DSRS aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.DSRS ]=-- Method (DSRS, 2, NotSerialized) { CreateWordField (Arg0, 0x09, IRQM) CreateByteField (Arg0, 0x0C, DMAM) CreateWordField (Arg0, 0x02, IO11) ENFG (CGLD (Arg1)) And (IO11, 0xFF, IOAL) ShiftRight (IO11, 0x08, IOAH) If (IRQM) { FindSetRightBit (IRQM, Local0) Subtract (Local0, One, INTR) } Else { Store (Zero, INTR) } If (DMAM) { FindSetRightBit (DMAM, Local0) Subtract (Local0, One, DMCH) } Else { Store (0x04, DMCH) } EXFG () DCNT (Arg1, One) } aml://_SB_.PCI0.SBRG.NBRM._CRS aml://_SB_.PCI0.SBRG.NBRM --=[ _SB.PCI0.SBRG.NBRM._CRS ]=-- Method (_CRS, 0, NotSerialized) { Return (CRS) } aml://_SB_.PCI0.SBRG.NBRM aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.NBRM ]=-- Device (NBRM) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x99) Name (CRS, ResourceTemplate () { }) Method (_CRS, 0, NotSerialized) { Return (CRS) } } aml://_SB_.PCI0.SBRG.RMSC._CRS aml://_SB_.PCI0.SBRG.RMSC --=[ _SB.PCI0.SBRG.RMSC._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MIN, GP00) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MAX, GP01) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._LEN, GP0L) Store (PMBS, GP00) Store (PMBS, GP01) Store (PMLN, GP0L) If (SMBS) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._MIN, GP10) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._MAX, GP11) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._LEN, GP1L) Store (SMBS, GP10) Store (SMBS, GP11) Store (SMBL, GP1L) } If (GPBS) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._MIN, GP20) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._MAX, GP21) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._LEN, GP2L) Store (GPBS, GP20) Store (GPBS, GP21) Store (GPLN, GP2L) } Return (CRS) } aml://_SB_.PCI0.SBRG.RMSC aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.RMSC ]=-- Device (RMSC) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x10) Name (CRS, ResourceTemplate () { IO (Decode16, 0x0010, // Range Minimum 0x0010, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x0022, // Range Minimum 0x0022, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x0044, // Range Minimum 0x0044, // Range Maximum 0x00, // Alignment 0x1C, // Length ) IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x00, // Alignment 0x0B, // Length ) IO (Decode16, 0x0072, // Range Minimum 0x0072, // Range Maximum 0x00, // Alignment 0x0E, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0084, // Range Minimum 0x0084, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0088, // Range Minimum 0x0088, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x008C, // Range Minimum 0x008C, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0090, // Range Minimum 0x0090, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x00A2, // Range Minimum 0x00A2, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x00E0, // Range Minimum 0x00E0, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x03E0, // Range Minimum 0x03E0, // Range Maximum 0x00, // Alignment 0x08, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y0C) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y0D) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y0E) }) Method (_CRS, 0, NotSerialized) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MIN, GP00) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MAX, GP01) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._LEN, GP0L) Store (PMBS, GP00) Store (PMBS, GP01) Store (PMLN, GP0L) If (SMBS) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._MIN, GP10) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._MAX, GP11) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._LEN, GP1L) Store (SMBS, GP10) Store (SMBS, GP11) Store (SMBL, GP1L) } If (GPBS) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._MIN, GP20) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._MAX, GP21) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._LEN, GP2L) Store (GPBS, GP20) Store (GPBS, GP21) Store (GPLN, GP2L) } Return (CRS) } } aml://\_SB_.PCI0.SBRG.ASOC._STA aml://\_SB_.PCI0.SBRG.ASOC --=[ \_SB.PCI0.SBRG.ASOC._STA ]=-- Method (_STA, 0, NotSerialized) { Return (0x0F) } aml://\_SB_.PCI0.SBRG.ASOC.ASIF aml://\_SB_.PCI0.SBRG.ASOC --=[ \_SB.PCI0.SBRG.ASOC.ASIF ]=-- Method (ASIF, 0, NotSerialized) { Return (MBIF) } aml://\_SB_.PCI0.SBRG.ASOC aml://\_SB_.PCI0.SBRG --=[ \_SB.PCI0.SBRG.ASOC ]=-- Device (ASOC) { Name (_HID, "ATK0110") Name (_UID, 0x01010110) Method (_STA, 0, NotSerialized) { Return (0x0F) } Name (MBIF, Package (0x08) { One, "M2V", One, Zero, Zero, Zero, Zero, Zero }) Method (ASIF, 0, NotSerialized) { Return (MBIF) } } aml://\_SB_.PCI0.SBRG aml://\_SB_.PCI0 --=[ \_SB.PCI0.SBRG ]=-- Scope (\_SB.PCI0.SBRG) { Device (ASOC) { Name (_HID, "ATK0110") Name (_UID, 0x01010110) Method (_STA, 0, NotSerialized) { Return (0x0F) } Name (MBIF, Package (0x08) { One, "M2V", One, Zero, Zero, Zero, Zero, Zero }) Method (ASIF, 0, NotSerialized) { Return (MBIF) } } } aml://_SB_.PCI0.SBRG.HPET._STA aml://_SB_.PCI0.SBRG.HPET --=[ _SB.PCI0.SBRG.HPET._STA ]=-- Method (_STA, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (Zero) } Else { Return (0x0F) } } aml://_SB_.PCI0.SBRG.HPET._CRS aml://_SB_.PCI0.SBRG.HPET --=[ _SB.PCI0.SBRG.HPET._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS1, \_SB.PCI0.SBRG.HPET._Y0F._BAS, BAS1) CreateDWordField (CRS1, \_SB.PCI0.SBRG.HPET._Y0F._LEN, LEN1) If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { ShiftLeft (HPTM, 0x08, DB98) ShiftLeft (HPTM, 0x08, BAS1) Store (0x0400, LEN1) Return (CRS1) } } aml://_SB_.PCI0.SBRG.HPET aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.HPET ]=-- Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_UID, Zero) Name (CRS0, ResourceTemplate () { }) Name (CRS1, ResourceTemplate () { Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y0F) IRQNoFlags () {0} IRQNoFlags () {8} }) Method (_STA, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (Zero) } Else { Return (0x0F) } } OperationRegion (DBHP, SystemIO, 0x98, 0x04) Field (DBHP, DWordAcc, NoLock, Preserve) { DB98, 32 } Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS1, \_SB.PCI0.SBRG.HPET._Y0F._BAS, BAS1) CreateDWordField (CRS1, \_SB.PCI0.SBRG.HPET._Y0F._LEN, LEN1) If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { ShiftLeft (HPTM, 0x08, DB98) ShiftLeft (HPTM, 0x08, BAS1) Store (0x0400, LEN1) Return (CRS1) } } } aml://_SB_.PCI0.SBRG.TMR_._CRS aml://_SB_.PCI0.SBRG.TMR_ --=[ _SB.PCI0.SBRG.TMR._CRS ]=-- Method (_CRS, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { Return (CRS1) } } aml://_SB_.PCI0.SBRG.TMR aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.TMR ]=-- Device (TMR) { Name (_HID, EisaId ("PNP0100")) Name (CRS0, ResourceTemplate () { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x00, // Alignment 0x04, // Length ) IRQNoFlags () {0} }) Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x00, // Alignment 0x04, // Length ) }) Method (_CRS, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { Return (CRS1) } } } aml://_SB_.PCI0.SBRG.RTC0._CRS aml://_SB_.PCI0.SBRG.RTC0 --=[ _SB.PCI0.SBRG.RTC0._CRS ]=-- Method (_CRS, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { Return (CRS1) } } aml://_SB_.PCI0.SBRG.RTC0 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.RTC0 ]=-- Device (RTC0) { Name (_HID, EisaId ("PNP0B00")) Name (CRS0, ResourceTemplate () { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x00, // Alignment 0x02, // Length ) IRQNoFlags () {8} }) Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x00, // Alignment 0x02, // Length ) }) Method (_CRS, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { Return (CRS1) } } } aml://\____.ISMI aml://\____ --=[ \.ISMI ]=-- Method (ISMI, 1, Serialized) { Store (Arg0, SMIC) } aml://\____.GNVS aml://\____ --=[ \.GNVS ]=-- Method (GNVS, 1, Serialized) { Store (Arg0, PAR0) ISMI (0x70) Return (PAR1) } aml://\____.SNVS aml://\____ --=[ \.SNVS ]=-- Method (SNVS, 2, Serialized) { Store (Arg0, PAR0) Store (Arg1, PAR1) ISMI (0x71) } aml://\_SB_.\AWY_.SMOD aml://\_SB_.\AWY_ --=[ \_SB.\AWY.SMOD ]=-- Method (SMOD, 1, NotSerialized) { } aml://\_SB_.\AWY_._STA aml://\_SB_.\AWY_ --=[ \_SB.\AWY._STA ]=-- Method (_STA, 0, NotSerialized) { If (AWEN) { Return (0x0F) } Return (Zero) } aml://\_SB_.\AWY aml://\_SB_ --=[ \_SB.\AWY ]=-- Device (\AWY) { Name (_HID, "AWY0001") Method (SMOD, 1, NotSerialized) { } Method (_STA, 0, NotSerialized) { If (AWEN) { Return (0x0F) } Return (Zero) } } aml://\_SB --=[ \_SB ]=-- Scope (\_SB) { Device (\AWY) { Name (_HID, "AWY0001") Method (SMOD, 1, NotSerialized) { } Method (_STA, 0, NotSerialized) { If (AWEN) { Return (0x0F) } Return (Zero) } } } aml://_SB_.PCI0.SBRG.^PCIE._CRS aml://_SB_.PCI0.SBRG.^PCIE --=[ _SB.PCI0.SBRG.^PCIE._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._BAS, BAS1) CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._LEN, LEN1) Store (PCIB, BAS1) Store (PCIL, LEN1) Return (CRS) } aml://_SB_.PCI0.SBRG.^PCIE aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.^PCIE ]=-- Device (^PCIE) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x11) Name (CRS, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xE0000000, // Address Base 0x10000000, // Address Length _Y10) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._BAS, BAS1) CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._LEN, LEN1) Store (PCIB, BAS1) Store (PCIL, LEN1) Return (CRS) } } aml://_SB_.PCI0.SBRG.OMSC._CRS aml://_SB_.PCI0.SBRG.OMSC --=[ _SB.PCI0.SBRG.OMSC._CRS ]=-- Method (_CRS, 0, NotSerialized) { If (APIC) { CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._LEN, ML01) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._BAS, MB01) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._LEN, ML02) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._BAS, MB02) Store (0xFEC00000, MB01) Store (0x1000, ML01) Store (0xFEE00000, MB02) Store (0x1000, ML02) } Return (CRS) } aml://_SB_.PCI0.SBRG.OMSC aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.OMSC ]=-- Device (OMSC) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, Zero) Name (CRS, ResourceTemplate () { Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y11) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y12) }) Method (_CRS, 0, NotSerialized) { If (APIC) { CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._LEN, ML01) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._BAS, MB01) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._LEN, ML02) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._BAS, MB02) Store (0xFEC00000, MB01) Store (0x1000, ML01) Store (0xFEE00000, MB02) Store (0x1000, ML02) } Return (CRS) } } aml://_SB_.PCI0.SBRG.^^RMEM._CRS aml://_SB_.PCI0.SBRG.^^RMEM --=[ _SB.PCI0.SBRG.^^RMEM._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS, \_SB.RMEM._Y13._BAS, BAS1) CreateDWordField (CRS, \_SB.RMEM._Y13._LEN, LEN1) CreateDWordField (CRS, \_SB.RMEM._Y14._BAS, BAS2) CreateDWordField (CRS, \_SB.RMEM._Y14._LEN, LEN2) CreateDWordField (CRS, \_SB.RMEM._Y15._LEN, LEN3) CreateDWordField (CRS, \_SB.RMEM._Y16._BAS, BAS4) CreateDWordField (CRS, \_SB.RMEM._Y16._LEN, LEN4) If (OSFL ()) {} Else { If (MG1B) { If (LGreater (MG1B, 0x000C0000)) { Store (0x000C0000, BAS1) Subtract (MG1B, BAS1, LEN1) } } Else { Store (0x000C0000, BAS1) Store (0x00020000, LEN1) } If (Add (MG1B, MG1L, Local0)) { Store (Local0, BAS2) Subtract (0x00100000, BAS2, LEN2) } } Subtract (MG2B, 0x00100000, LEN3) Add (MG2B, MG2L, BAS4) Subtract (Zero, BAS4, LEN4) Return (CRS) } aml://_SB_.PCI0.SBRG.^^RMEM aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.^^RMEM ]=-- Device (^^RMEM) { Name (_HID, EisaId ("PNP0C01")) Name (_UID, One) Name (CRS, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x000A0000, // Address Length ) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y13) Memory32Fixed (ReadOnly, 0x000E0000, // Address Base 0x00020000, // Address Length _Y14) Memory32Fixed (ReadWrite, 0x00100000, // Address Base 0x00000000, // Address Length _Y15) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y16) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS, \_SB.RMEM._Y13._BAS, BAS1) CreateDWordField (CRS, \_SB.RMEM._Y13._LEN, LEN1) CreateDWordField (CRS, \_SB.RMEM._Y14._BAS, BAS2) CreateDWordField (CRS, \_SB.RMEM._Y14._LEN, LEN2) CreateDWordField (CRS, \_SB.RMEM._Y15._LEN, LEN3) CreateDWordField (CRS, \_SB.RMEM._Y16._BAS, BAS4) CreateDWordField (CRS, \_SB.RMEM._Y16._LEN, LEN4) If (OSFL ()) {} Else { If (MG1B) { If (LGreater (MG1B, 0x000C0000)) { Store (0x000C0000, BAS1) Subtract (MG1B, BAS1, LEN1) } } Else { Store (0x000C0000, BAS1) Store (0x00020000, LEN1) } If (Add (MG1B, MG1L, Local0)) { Store (Local0, BAS2) Subtract (0x00100000, BAS2, LEN2) } } Subtract (MG2B, 0x00100000, LEN3) Add (MG2B, MG2L, BAS4) Subtract (Zero, BAS4, LEN4) Return (CRS) } } aml://_SB_.PCI0.SBRG.UAR1._HID aml://_SB_.PCI0.SBRG.UAR1 --=[ _SB.PCI0.SBRG.UAR1._HID ]=-- Method (_HID, 0, NotSerialized) { Return (UHID (Zero)) } aml://_SB_.PCI0.SBRG.UAR1._STA aml://_SB_.PCI0.SBRG.UAR1 --=[ _SB.PCI0.SBRG.UAR1._STA ]=-- Method (_STA, 0, NotSerialized) { Return (DSTA (Zero)) } aml://_SB_.PCI0.SBRG.UAR1._DIS aml://_SB_.PCI0.SBRG.UAR1 --=[ _SB.PCI0.SBRG.UAR1._DIS ]=-- Method (_DIS, 0, NotSerialized) { DCNT (Zero, Zero) } aml://_SB_.PCI0.SBRG.UAR1._CRS aml://_SB_.PCI0.SBRG.UAR1 --=[ _SB.PCI0.SBRG.UAR1._CRS ]=-- Method (_CRS, 0, NotSerialized) { Return (DCRS (Zero, One)) } aml://_SB_.PCI0.SBRG.UAR1._SRS aml://_SB_.PCI0.SBRG.UAR1 --=[ _SB.PCI0.SBRG.UAR1._SRS ]=-- Method (_SRS, 1, NotSerialized) { DSRS (Arg0, Zero) } aml://_SB_.PCI0.SBRG.UAR1._PRS aml://_SB_.PCI0.SBRG.UAR1 --=[ _SB.PCI0.SBRG.UAR1._PRS ]=-- Method (_PRS, 0, NotSerialized) { Return (CMPR) } aml://_SB_.PCI0.SBRG.UAR1 aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.UAR1 ]=-- Device (UAR1) { Name (_UID, One) Method (_HID, 0, NotSerialized) { Return (UHID (Zero)) } Method (_STA, 0, NotSerialized) { Return (DSTA (Zero)) } Method (_DIS, 0, NotSerialized) { DCNT (Zero, Zero) } Method (_CRS, 0, NotSerialized) { Return (DCRS (Zero, One)) } Method (_SRS, 1, NotSerialized) { DSRS (Arg0, Zero) } Method (_PRS, 0, NotSerialized) { Return (CMPR) } Name (CMPR, ResourceTemplate () { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {4} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x02F8, // Range Minimum 0x02F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03E8, // Range Minimum 0x03E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x02E8, // Range Minimum 0x02E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x02F8, // Range Minimum 0x02F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x03E8, // Range Minimum 0x03E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x02E8, // Range Minimum 0x02E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } EndDependentFn () }) } aml://_SB_.PCI0.SBRG.UAR1._PRW aml://_SB_.PCI0.SBRG.UAR1 --=[ _SB.PCI0.SBRG.UAR1._PRW ]=-- Method (UAR1._PRW, 0, NotSerialized) { Return (GPRW (0x08, 0x04)) } aml://_SB_.PCI0.SBRG.PS2K._STA aml://_SB_.PCI0.SBRG.PS2K --=[ _SB.PCI0.SBRG.PS2K._STA ]=-- Method (_STA, 0, NotSerialized) { ShiftLeft (One, 0x0A, Local0) If (And (IOST, Local0)) { Return (0x0F) } Return (Zero) } aml://_SB_.PCI0.SBRG.PS2K aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.PS2K ]=-- Device (PS2K) { Name (_HID, EisaId ("PNP0303")) Name (_CID, 0x0B03D041) Method (_STA, 0, NotSerialized) { ShiftLeft (One, 0x0A, Local0) If (And (IOST, Local0)) { Return (0x0F) } Return (Zero) } Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x00, // Alignment 0x01, // Length ) IRQNoFlags () {1} }) } aml://_SB_.PCI0.SBRG.PS2K._PRW aml://_SB_.PCI0.SBRG.PS2K --=[ _SB.PCI0.SBRG.PS2K._PRW ]=-- Method (PS2K._PRW, 0, NotSerialized) { Return (GPRW (0x02, 0x04)) } aml://_SB_.PCI0.SBRG.PS2M._STA aml://_SB_.PCI0.SBRG.PS2M --=[ _SB.PCI0.SBRG.PS2M._STA ]=-- Method (_STA, 0, NotSerialized) { ShiftLeft (One, 0x0C, Local0) If (And (IOST, Local0)) { Return (0x0F) } Return (Zero) } aml://_SB_.PCI0.SBRG.PS2M aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.PS2M ]=-- Device (PS2M) { Name (_HID, EisaId ("PNP0F03")) Name (_CID, 0x130FD041) Method (_STA, 0, NotSerialized) { ShiftLeft (One, 0x0C, Local0) If (And (IOST, Local0)) { Return (0x0F) } Return (Zero) } Name (_CRS, ResourceTemplate () { IRQNoFlags () {12} }) } aml://_SB_.PCI0.SBRG.PS2M._PRW aml://_SB_.PCI0.SBRG.PS2M --=[ _SB.PCI0.SBRG.PS2M._PRW ]=-- Method (PS2M._PRW, 0, NotSerialized) { Return (GPRW (0x09, 0x04)) } aml://_SB_.PCI0.SBRG aml://_SB_.PCI0 --=[ _SB.PCI0.SBRG ]=-- Device (SBRG) { Name (_ADR, 0x00110000) Method (SPTS, 1, NotSerialized) { If (LAnd (LEqual (Arg0, 0x04), LEqual (OSFL (), 0x02))) { Sleep (0x0BB8) } If (LEqual (Arg0, One)) { While (WAKS) { Stall (0x50) Store (One, WAKS) } While (LNotEqual (PADS, Zero)) { Store (PADS, PADS) } Store (One, IRQR) Store (One, SUST) } If (LEqual (Arg0, 0x03)) { Store (Zero, SUST) } Store (One, SLPS) While (SLES) { Stall (0x50) Store (One, SLES) } Store (One, SLEE) } Method (SWAK, 1, NotSerialized) { If (LAnd (LEqual (Arg0, 0x03), PM5D)) {} Else { If (LAnd (LEqual (Arg0, One), PM5D)) {} Else { Notify (PWRB, 0x02) } } Store (Zero, PM5D) Store (One, PWBT) Store (Zero, SLEE) Store (Zero, ^^USB1.U184) Store (Zero, ^^USB2.U284) Store (Zero, ^^USB3.U384) Store (Zero, ^^USB4.U484) Store (Zero, ^^EHCI.U584) Store (Zero, SLPS) } OperationRegion (PMSR, SystemIO, PM5C, 0x02) Field (PMSR, ByteAcc, NoLock, Preserve) { Offset (0x01), PM5D, 1 } OperationRegion (PMS0, SystemIO, PMBS, 0x04) Field (PMS0, ByteAcc, NoLock, Preserve) { , 10, RTCS, 1, Offset (0x03), PWBT, 1, Offset (0x04) } OperationRegion (IOTP, SystemIO, PM28, 0x04) Field (IOTP, ByteAcc, NoLock, Preserve) { , 7, WAKS, 1, , 2, SLES, 1, , 4, PS1S, 1, , 10, SLEE, 1, , 4, PS1E, 1 } OperationRegion (PMGE, SystemIO, PMBS, 0x30) Field (PMGE, ByteAcc, NoLock, Preserve) { Offset (0x2A), , 7, IRQR, 1 } OperationRegion (PMPS, SystemIO, PMBS, 0x40) Field (PMPS, ByteAcc, NoLock, Preserve) { Offset (0x30), , 1, PADS, 7 } OperationRegion (HPRG, PCI_Config, 0x68, 0x04) Field (HPRG, ByteAcc, NoLock, Preserve) { , 7, HPTE, 1, HPTM, 24 } OperationRegion (BSR0, PCI_Config, 0x6F, One) Field (BSR0, ByteAcc, NoLock, Preserve) { , 7, RTCX, 1 } Name (PTBF, Buffer (0x03) { /* 0000 */ 0x00, 0x00, 0x00 }) CreateByteField (PTBF, One, PTB1) CreateByteField (PTBF, 0x02, PTB2) Scope (\_SB) { Name (SLPS, Zero) Device (SLPB) { Name (_HID, EisaId ("PNP0C0E")) Method (_STA, 0, NotSerialized) { If (LNotEqual (SUSW, 0xFF)) { Return (0x0F) } Return (Zero) } Method (SBEV, 0, NotSerialized) { If (SLPS) { Notify (SLPB, 0x02) } Else { Notify (SLPB, 0x80) } } Method (\_GPE._L04, 0, NotSerialized) { \_SB.SLPB.SBEV () } Method (_PRW, 0, NotSerialized) { Return (Package (0x02) { 0x04, 0x04 }) } } } Device (PIC) { Name (_HID, EisaId ("PNP0000")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x00, // Alignment 0x02, // Length ) IRQNoFlags () {2} }) } Device (DMAD) { Name (_HID, EisaId ("PNP0200")) Name (_CRS, ResourceTemplate () { DMA (Compatibility, BusMaster, Transfer8, ) {4} IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0087, // Range Minimum 0x0087, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0089, // Range Minimum 0x0089, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x008F, // Range Minimum 0x008F, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x00, // Alignment 0x20, // Length ) }) } Device (SPKR) { Name (_HID, EisaId ("PNP0800")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x00, // Alignment 0x01, // Length ) }) } Device (COPR) { Name (_HID, EisaId ("PNP0C04")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x00, // Alignment 0x10, // Length ) IRQNoFlags () {13} }) } Device (FDC) { Name (_HID, EisaId ("PNP0700")) Method (_FDE, 0, NotSerialized) { Name (FDEP, Package (0x05) { Zero, Zero, 0x02, 0x02, 0x02 }) If (_STA ()) { Store (One, Index (FDEP, Zero)) } Return (FDEP) } Method (_STA, 0, NotSerialized) { Return (DSTA (0x03)) } Method (_DIS, 0, NotSerialized) { DCNT (0x03, Zero) } Method (_CRS, 0, NotSerialized) { DCRS (0x03, One) Store (IRQM, IRQE) Store (DMAM, DMAE) Store (IO11, IO21) Store (IO12, IO22) Store (0x06, LEN2) Add (IO21, 0x07, IO31) Store (IO31, IO32) Store (One, LEN3) Return (CRS2) } Method (_SRS, 1, NotSerialized) { DSRS (Arg0, 0x03) CreateWordField (Arg0, 0x11, IRQE) CreateByteField (Arg0, 0x14, DMAE) ENFG (CGLD (0x03)) If (IRQE) { FindSetRightBit (IRQE, Local0) Subtract (Local0, One, INTR) } Else { Store (Zero, INTR) } If (DMAE) { FindSetRightBit (DMAE, Local0) Subtract (Local0, One, DMCH) } Else { Store (0x04, DMCH) } EXFG () } Name (_PRS, ResourceTemplate () { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x03F0, // Range Minimum 0x03F0, // Range Maximum 0x01, // Alignment 0x06, // Length ) IO (Decode16, 0x03F7, // Range Minimum 0x03F7, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {6} DMA (Compatibility, NotBusMaster, Transfer8, ) {2} } StartDependentFnNoPri () { IO (Decode16, 0x03F0, // Range Minimum 0x03F0, // Range Maximum 0x01, // Alignment 0x06, // Length ) IO (Decode16, 0x03F7, // Range Minimum 0x03F7, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x0370, // Range Minimum 0x0370, // Range Maximum 0x01, // Alignment 0x06, // Length ) IO (Decode16, 0x0377, // Range Minimum 0x0377, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } EndDependentFn () }) } Device (LPTE) { Method (_HID, 0, NotSerialized) { If (LPTM (0x02)) { Return (0x0104D041) } Else { Return (0x0004D041) } } Method (_STA, 0, NotSerialized) { Return (DSTA (0x02)) } Method (_DIS, 0, NotSerialized) { DCNT (0x02, Zero) } Method (_CRS, 0, NotSerialized) { DCRS (0x02, One) If (LPTM (0x02)) { Store (IRQM, IRQE) Store (DMAM, DMAE) Store (IO11, IO21) Store (IO12, IO22) Store (LEN1, LEN2) Add (IO21, 0x0400, IO31) Store (IO31, IO32) Store (LEN2, LEN3) Return (CRS2) } Else { Return (CRS1) } } Method (_SRS, 1, NotSerialized) { DSRS (Arg0, 0x02) } Method (_PRS, 0, NotSerialized) { If (LPTM (0x02)) { Return (EPPR) } Else { Return (LPPR) } } Name (LPPR, ResourceTemplate () { StartDependentFnNoPri () { IO (Decode16, 0x0378, // Range Minimum 0x0378, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x0278, // Range Minimum 0x0278, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03BC, // Range Minimum 0x03BC, // Range Maximum 0x01, // Alignment 0x04, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } EndDependentFn () }) Name (EPPR, ResourceTemplate () { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x0378, // Range Minimum 0x0378, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0778, // Range Minimum 0x0778, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {7} DMA (Compatibility, NotBusMaster, Transfer8, ) {3} } StartDependentFnNoPri () { IO (Decode16, 0x0378, // Range Minimum 0x0378, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0778, // Range Minimum 0x0778, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x0278, // Range Minimum 0x0278, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0678, // Range Minimum 0x0678, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x03BC, // Range Minimum 0x03BC, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x07BC, // Range Minimum 0x07BC, // Range Maximum 0x01, // Alignment 0x04, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } EndDependentFn () }) } Device (SIOR) { Name (_HID, EisaId ("PNP0C02")) Method (_UID, 0, NotSerialized) { Return (SPIO) } Name (CRS, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y00) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y01) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y02) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y03) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y04) }) Method (_CRS, 0, NotSerialized) { If (LAnd (LNotEqual (SPIO, 0x03F0), LGreater (SPIO, 0xF0))) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MIN, GP10) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MAX, GP11) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._LEN, GPL1) Store (SPIO, GP10) Store (SPIO, GP11) Store (0x02, GPL1) } If (IOPB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MIN, GP20) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MAX, GP21) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._LEN, GPL2) Store (IOPB, GP20) Store (IOPB, GP21) Store (IOPL, GPL2) } If (IOEB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MIN, GP30) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MAX, GP31) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._LEN, GPL3) Store (IOEB, GP30) Store (IOEB, GP31) Store (IOEL, GPL3) } If (IOGB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._MIN, GP40) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._MAX, GP41) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._LEN, GPL4) Store (IOGB, GP40) Store (IOGB, GP41) Store (IOGL, GPL4) } If (IODB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._MIN, GP50) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._MAX, GP51) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._LEN, GPL5) Store (IODB, GP50) Store (IODB, GP51) Store (IODL, GPL5) } Return (CRS) } } Name (DCAT, Package (0x16) { One, 0x02, 0x03, Zero, 0xFF, 0x08, 0xFF, 0xFF, 0x09, 0xFF, 0x05, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0x0A, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }) Name (IKEY, Package (0x02) { Package (0x04) { 0x87, One, 0x55, 0x55 }, Package (0x04) { 0x87, One, 0x55, 0xAA } }) Name (KBFG, One) Name (MSFG, One) Name (UR1F, One) Method (ENFG, 1, NotSerialized) { Store (Zero, Local1) If (LEqual (SPIO, 0x2E)) { Store (Zero, Local1) } If (LEqual (SPIO, 0x4E)) { Store (One, Local1) } Store (Zero, Local0) While (LNotEqual (Local0, 0x04)) { Store (DerefOf (Index (DerefOf (Index (IKEY, Local1)), Local0)), INDX) Increment (Local0) } Store (Arg0, LDN) } Method (ENTR, 0, NotSerialized) { Store (0x87, INDX) Store (One, INDX) Store (0x55, INDX) If (LEqual (SPIO, 0x2E)) { Store (0x55, INDX) } Else { Store (0xAA, INDX) } } Method (EXFG, 0, NotSerialized) { Store (0x02, INDX) Store (0x02, DATA) } Method (LPTM, 1, NotSerialized) { ENFG (CGLD (Arg0)) And (OPT0, 0x02, Local0) EXFG () Return (Local0) } Method (UHID, 1, NotSerialized) { ENFG (CGLD (Arg0)) And (OPT0, 0x70, Local0) EXFG () If (Local0) { Return (0x1005D041) } Return (0x0105D041) } Method (ORF0, 1, NotSerialized) { ENTR () Or (OPT0, Arg0, OPT0) EXFG () } Method (ORF1, 1, NotSerialized) { ENTR () Or (OPT1, Arg0, OPT1) EXFG () } Method (ORF2, 1, NotSerialized) { ENTR () Or (OPT2, Arg0, OPT2) EXFG () } Method (ANF0, 1, NotSerialized) { ENTR () And (OPT0, Arg0, OPT0) EXFG () } Method (ANF2, 1, NotSerialized) { ENTR () And (OPT2, Arg0, OPT2) EXFG () } Method (ANF4, 1, NotSerialized) { ENTR () And (OPT4, Arg0, OPT4) EXFG () } Method (STF0, 1, NotSerialized) { ENTR () Store (Arg0, OPT0) EXFG () } Method (STF1, 1, NotSerialized) { ENTR () Store (Arg0, OPT1) EXFG () } Method (SIOS, 1, NotSerialized) { Store ("SIOS", Debug) Store (Zero, GP10) If (LLess (Arg0, 0x05)) { ENFG (0x04) Store (One, ACTR) EXFG () ANF4 (0xFC) ORF1 (0x18) If (KBFG) { ORF0 (0x08) } Else { ANF0 (0xF7) } If (MSFG) { ORF0 (0x10) } Else { ANF0 (0xEF) ENFG (0x06) Store (Zero, ACTR) EXFG () } ENFG (0x04) ANF2 (0xF0) ENFG (0x07) And (OPF9, 0xFE, OPF9) And (OPC0, 0xFE, OPC0) And (OPC3, 0xFE, OPC3) And (OP29, 0xEF, OP29) EXFG () } Else { ENFG (0x07) And (OPC0, Zero, OPC0) Or (OPC0, One, OPC0) And (OPC3, Zero, OPC3) Or (OPC3, One, OPC3) Or (OPF9, One, OPF9) And (OP29, 0xEF, OP29) EXFG () } } Method (SIOW, 1, NotSerialized) { Store (One, GP10) Store (One, GP40) Store ("SIOW", Debug) ENFG (0x04) Store (Zero, ACTR) EXFG () STF0 (Zero) STF1 (0xFF) ENFG (0x07) Or (OP29, 0x10, OP29) Or (OPC0, One, OPC0) Or (OPC3, One, OPC3) EXFG () ENFG (0x05) Or (ACTR, One, ACTR) EXFG () ENFG (0x06) Or (ACTR, One, ACTR) EXFG () ENFG (0x04) Store (One, ACTR) EXFG () } Method (SIOH, 0, NotSerialized) { Store ("SIOH", Debug) } OperationRegion (IOID, SystemIO, SPIO, 0x02) Field (IOID, ByteAcc, NoLock, Preserve) { INDX, 8, DATA, 8 } IndexField (INDX, DATA, ByteAcc, NoLock, Preserve) { Offset (0x07), LDN, 8, Offset (0x29), OP29, 8, Offset (0x30), ACTR, 8, Offset (0x60), IOAH, 8, IOAL, 8, IOH2, 8, IOL2, 8, Offset (0x70), INTR, 8, Offset (0x74), DMCH, 8, Offset (0xC0), OPC0, 8, OPC1, 8, OPC2, 8, OPC3, 8, Offset (0xF0), OPT0, 8, OPT1, 8, OPT2, 8, OPT3, 8, OPT4, 8, Offset (0xF8), OPF8, 8, OPF9, 8, OPFA, 8, OPFB, 8 } Method (CGLD, 1, NotSerialized) { Return (DerefOf (Index (DCAT, Arg0))) } Method (DSTA, 1, NotSerialized) { ENFG (CGLD (Arg0)) Store (ACTR, Local0) EXFG () If (LEqual (Local0, 0xFF)) { Return (Zero) } And (Local0, One, Local0) Or (IOST, ShiftLeft (Local0, Arg0), IOST) If (Local0) { Return (0x0F) } Else { If (And (ShiftLeft (One, Arg0), IOST)) { Return (0x0D) } Else { Return (Zero) } } } Method (DCNT, 2, NotSerialized) { ENFG (CGLD (Arg0)) ShiftLeft (IOAH, 0x08, Local1) Or (IOAL, Local1, Local1) RRIO (Arg0, Arg1, Local1, 0x08) If (LAnd (LLess (DMCH, 0x04), LNotEqual (And (DMCH, 0x03, Local1), Zero))) { RDMA (Arg0, Arg1, Increment (Local1)) } Store (Arg1, ACTR) EXFG () } Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y07) IRQNoFlags (_Y05) {} DMA (Compatibility, NotBusMaster, Transfer8, _Y06) {} }) CreateWordField (CRS1, \_SB.PCI0.SBRG._Y05._INT, IRQM) CreateByteField (CRS1, \_SB.PCI0.SBRG._Y06._DMA, DMAM) CreateWordField (CRS1, \_SB.PCI0.SBRG._Y07._MIN, IO11) CreateWordField (CRS1, \_SB.PCI0.SBRG._Y07._MAX, IO12) CreateByteField (CRS1, \_SB.PCI0.SBRG._Y07._LEN, LEN1) Name (CRS2, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y0A) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y0B) IRQNoFlags (_Y08) {6} DMA (Compatibility, NotBusMaster, Transfer8, _Y09) {2} }) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y08._INT, IRQE) CreateByteField (CRS2, \_SB.PCI0.SBRG._Y09._DMA, DMAE) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y0A._MIN, IO21) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y0A._MAX, IO22) CreateByteField (CRS2, \_SB.PCI0.SBRG._Y0A._LEN, LEN2) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y0B._MIN, IO31) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y0B._MAX, IO32) CreateByteField (CRS2, \_SB.PCI0.SBRG._Y0B._LEN, LEN3) Method (DCRS, 2, NotSerialized) { ENFG (CGLD (Arg0)) ShiftLeft (IOAH, 0x08, IO11) Or (IOAL, IO11, IO11) Store (IO11, IO12) Subtract (FindSetRightBit (IO11), One, Local0) ShiftLeft (One, Local0, LEN1) If (INTR) { ShiftLeft (One, INTR, IRQM) } Else { Store (Zero, IRQM) } If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero))) { Store (Zero, DMAM) } Else { And (DMCH, 0x03, Local1) ShiftLeft (One, Local1, DMAM) } EXFG () Return (CRS1) } Method (DSRS, 2, NotSerialized) { CreateWordField (Arg0, 0x09, IRQM) CreateByteField (Arg0, 0x0C, DMAM) CreateWordField (Arg0, 0x02, IO11) ENFG (CGLD (Arg1)) And (IO11, 0xFF, IOAL) ShiftRight (IO11, 0x08, IOAH) If (IRQM) { FindSetRightBit (IRQM, Local0) Subtract (Local0, One, INTR) } Else { Store (Zero, INTR) } If (DMAM) { FindSetRightBit (DMAM, Local0) Subtract (Local0, One, DMCH) } Else { Store (0x04, DMCH) } EXFG () DCNT (Arg1, One) } OperationRegion (GPIO, SystemIO, IO1B, 0x04) Field (GPIO, ByteAcc, NoLock, Preserve) { GP10, 1, GP11, 1, GP12, 1, GP13, 1, GO14, 1, GO15, 1, GO16, 1, GO17, 1, GP20, 1, GP21, 1, GP22, 1, GP23, 1, GO24, 1, GO25, 1, GO26, 1, GO27, 1, GP30, 1, GP31, 1, GP32, 1, GP33, 1, GO34, 1, GO35, 1, GO36, 1, GO37, 1, GP40, 1, GP41, 1, GP42, 1, GP43, 1, GO44, 1, GO45, 1, GO46, 1, GO47, 1 } Device (NBRM) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x99) Name (CRS, ResourceTemplate () { }) Method (_CRS, 0, NotSerialized) { Return (CRS) } } Device (RMSC) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x10) Name (CRS, ResourceTemplate () { IO (Decode16, 0x0010, // Range Minimum 0x0010, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x0022, // Range Minimum 0x0022, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x0044, // Range Minimum 0x0044, // Range Maximum 0x00, // Alignment 0x1C, // Length ) IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x00, // Alignment 0x0B, // Length ) IO (Decode16, 0x0072, // Range Minimum 0x0072, // Range Maximum 0x00, // Alignment 0x0E, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0084, // Range Minimum 0x0084, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0088, // Range Minimum 0x0088, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x008C, // Range Minimum 0x008C, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0090, // Range Minimum 0x0090, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x00A2, // Range Minimum 0x00A2, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x00E0, // Range Minimum 0x00E0, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x03E0, // Range Minimum 0x03E0, // Range Maximum 0x00, // Alignment 0x08, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y0C) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y0D) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y0E) }) Method (_CRS, 0, NotSerialized) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MIN, GP00) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MAX, GP01) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._LEN, GP0L) Store (PMBS, GP00) Store (PMBS, GP01) Store (PMLN, GP0L) If (SMBS) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._MIN, GP10) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._MAX, GP11) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._LEN, GP1L) Store (SMBS, GP10) Store (SMBS, GP11) Store (SMBL, GP1L) } If (GPBS) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._MIN, GP20) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._MAX, GP21) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._LEN, GP2L) Store (GPBS, GP20) Store (GPBS, GP21) Store (GPLN, GP2L) } Return (CRS) } } Scope (\_SB.PCI0.SBRG) { Device (ASOC) { Name (_HID, "ATK0110") Name (_UID, 0x01010110) Method (_STA, 0, NotSerialized) { Return (0x0F) } Name (MBIF, Package (0x08) { One, "M2V", One, Zero, Zero, Zero, Zero, Zero }) Method (ASIF, 0, NotSerialized) { Return (MBIF) } } } Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_UID, Zero) Name (CRS0, ResourceTemplate () { }) Name (CRS1, ResourceTemplate () { Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y0F) IRQNoFlags () {0} IRQNoFlags () {8} }) Method (_STA, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (Zero) } Else { Return (0x0F) } } OperationRegion (DBHP, SystemIO, 0x98, 0x04) Field (DBHP, DWordAcc, NoLock, Preserve) { DB98, 32 } Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS1, \_SB.PCI0.SBRG.HPET._Y0F._BAS, BAS1) CreateDWordField (CRS1, \_SB.PCI0.SBRG.HPET._Y0F._LEN, LEN1) If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { ShiftLeft (HPTM, 0x08, DB98) ShiftLeft (HPTM, 0x08, BAS1) Store (0x0400, LEN1) Return (CRS1) } } } Device (TMR) { Name (_HID, EisaId ("PNP0100")) Name (CRS0, ResourceTemplate () { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x00, // Alignment 0x04, // Length ) IRQNoFlags () {0} }) Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x00, // Alignment 0x04, // Length ) }) Method (_CRS, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { Return (CRS1) } } } Device (RTC0) { Name (_HID, EisaId ("PNP0B00")) Name (CRS0, ResourceTemplate () { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x00, // Alignment 0x02, // Length ) IRQNoFlags () {8} }) Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x00, // Alignment 0x02, // Length ) }) Method (_CRS, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { Return (CRS1) } } } Scope (\) { OperationRegion (RAMW, SystemMemory, Subtract (TOPM, 0x00010000), 0x00010000) Field (RAMW, ByteAcc, NoLock, Preserve) { PAR0, 32, PAR1, 32 } OperationRegion (IOB2, SystemIO, 0x082F, 0x02) Field (IOB2, ByteAcc, NoLock, Preserve) { SMIC, 8, SMIS, 8 } Method (ISMI, 1, Serialized) { Store (Arg0, SMIC) } Method (GNVS, 1, Serialized) { Store (Arg0, PAR0) ISMI (0x70) Return (PAR1) } Method (SNVS, 2, Serialized) { Store (Arg0, PAR0) Store (Arg1, PAR1) ISMI (0x71) } } Scope (\) { Field (RAMW, ByteAcc, NoLock, Preserve) { Offset (0x28), AWEN, 1 } } Scope (\_SB) { Device (\AWY) { Name (_HID, "AWY0001") Method (SMOD, 1, NotSerialized) { } Method (_STA, 0, NotSerialized) { If (AWEN) { Return (0x0F) } Return (Zero) } } } Device (^PCIE) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x11) Name (CRS, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xE0000000, // Address Base 0x10000000, // Address Length _Y10) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._BAS, BAS1) CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._LEN, LEN1) Store (PCIB, BAS1) Store (PCIL, LEN1) Return (CRS) } } Device (OMSC) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, Zero) Name (CRS, ResourceTemplate () { Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y11) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y12) }) Method (_CRS, 0, NotSerialized) { If (APIC) { CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._LEN, ML01) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._BAS, MB01) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._LEN, ML02) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._BAS, MB02) Store (0xFEC00000, MB01) Store (0x1000, ML01) Store (0xFEE00000, MB02) Store (0x1000, ML02) } Return (CRS) } } Device (^^RMEM) { Name (_HID, EisaId ("PNP0C01")) Name (_UID, One) Name (CRS, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x000A0000, // Address Length ) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y13) Memory32Fixed (ReadOnly, 0x000E0000, // Address Base 0x00020000, // Address Length _Y14) Memory32Fixed (ReadWrite, 0x00100000, // Address Base 0x00000000, // Address Length _Y15) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y16) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS, \_SB.RMEM._Y13._BAS, BAS1) CreateDWordField (CRS, \_SB.RMEM._Y13._LEN, LEN1) CreateDWordField (CRS, \_SB.RMEM._Y14._BAS, BAS2) CreateDWordField (CRS, \_SB.RMEM._Y14._LEN, LEN2) CreateDWordField (CRS, \_SB.RMEM._Y15._LEN, LEN3) CreateDWordField (CRS, \_SB.RMEM._Y16._BAS, BAS4) CreateDWordField (CRS, \_SB.RMEM._Y16._LEN, LEN4) If (OSFL ()) {} Else { If (MG1B) { If (LGreater (MG1B, 0x000C0000)) { Store (0x000C0000, BAS1) Subtract (MG1B, BAS1, LEN1) } } Else { Store (0x000C0000, BAS1) Store (0x00020000, LEN1) } If (Add (MG1B, MG1L, Local0)) { Store (Local0, BAS2) Subtract (0x00100000, BAS2, LEN2) } } Subtract (MG2B, 0x00100000, LEN3) Add (MG2B, MG2L, BAS4) Subtract (Zero, BAS4, LEN4) Return (CRS) } } Device (UAR1) { Name (_UID, One) Method (_HID, 0, NotSerialized) { Return (UHID (Zero)) } Method (_STA, 0, NotSerialized) { Return (DSTA (Zero)) } Method (_DIS, 0, NotSerialized) { DCNT (Zero, Zero) } Method (_CRS, 0, NotSerialized) { Return (DCRS (Zero, One)) } Method (_SRS, 1, NotSerialized) { DSRS (Arg0, Zero) } Method (_PRS, 0, NotSerialized) { Return (CMPR) } Name (CMPR, ResourceTemplate () { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {4} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x02F8, // Range Minimum 0x02F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03E8, // Range Minimum 0x03E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x02E8, // Range Minimum 0x02E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x02F8, // Range Minimum 0x02F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x03E8, // Range Minimum 0x03E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x02E8, // Range Minimum 0x02E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } EndDependentFn () }) } Method (UAR1._PRW, 0, NotSerialized) { Return (GPRW (0x08, 0x04)) } Device (PS2K) { Name (_HID, EisaId ("PNP0303")) Name (_CID, 0x0B03D041) Method (_STA, 0, NotSerialized) { ShiftLeft (One, 0x0A, Local0) If (And (IOST, Local0)) { Return (0x0F) } Return (Zero) } Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x00, // Alignment 0x01, // Length ) IRQNoFlags () {1} }) } Method (PS2K._PRW, 0, NotSerialized) { Return (GPRW (0x02, 0x04)) } Device (PS2M) { Name (_HID, EisaId ("PNP0F03")) Name (_CID, 0x130FD041) Method (_STA, 0, NotSerialized) { ShiftLeft (One, 0x0C, Local0) If (And (IOST, Local0)) { Return (0x0F) } Return (Zero) } Name (_CRS, ResourceTemplate () { IRQNoFlags () {12} }) } Method (PS2M._PRW, 0, NotSerialized) { Return (GPRW (0x09, 0x04)) } } aml://_SB_.PCI0.SVLK aml://_SB_.PCI0 --=[ _SB.PCI0.SVLK ]=-- Device (SVLK) { Name (_ADR, 0x00110007) } aml://_SB_.PCI0.P0P9._PRT aml://_SB_.PCI0.P0P9 --=[ _SB.PCI0.P0P9._PRT ]=-- Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR09) } Return (PR09) } aml://_SB_.PCI0.P0P9.HDAC aml://_SB_.PCI0.P0P9 --=[ _SB.PCI0.P0P9.HDAC ]=-- Device (HDAC) { Name (_ADR, 0x00010000) } aml://_SB_.PCI0.P0P9 aml://_SB_.PCI0 --=[ _SB.PCI0.P0P9 ]=-- Device (P0P9) { Name (_ADR, 0x00130000) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR09) } Return (PR09) } Device (HDAC) { Name (_ADR, 0x00010000) } } aml://_SB_.PCI0.USB1._S3D aml://_SB_.PCI0.USB1 --=[ _SB.PCI0.USB1._S3D ]=-- Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } aml://_SB_.PCI0.USB1._PRW aml://_SB_.PCI0.USB1 --=[ _SB.PCI0.USB1._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } aml://_SB_.PCI0.USB1 aml://_SB_.PCI0 --=[ _SB.PCI0.USB1 ]=-- Device (USB1) { Name (_ADR, 0x00100000) OperationRegion (WAU1, PCI_Config, 0x84, One) Field (WAU1, ByteAcc, NoLock, Preserve) { U184, 8 } OperationRegion (U1D3, PCI_Config, 0x49, One) Field (U1D3, ByteAcc, NoLock, Preserve) { UR49, 3 } OperationRegion (UBP1, PCI_Config, 0x85, One) Field (UBP1, ByteAcc, NoLock, Preserve) { U1PE, 1 } Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } aml://_SB_.PCI0.USB2._S3D aml://_SB_.PCI0.USB2 --=[ _SB.PCI0.USB2._S3D ]=-- Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } aml://_SB_.PCI0.USB2._PRW aml://_SB_.PCI0.USB2 --=[ _SB.PCI0.USB2._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } aml://_SB_.PCI0.USB2 aml://_SB_.PCI0 --=[ _SB.PCI0.USB2 ]=-- Device (USB2) { Name (_ADR, 0x00100001) OperationRegion (WAU2, PCI_Config, 0x84, One) Field (WAU2, ByteAcc, NoLock, Preserve) { U284, 8 } OperationRegion (UBP2, PCI_Config, 0x85, One) Field (UBP2, ByteAcc, NoLock, Preserve) { U2PE, 1 } Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } aml://_SB_.PCI0.USB3._S3D aml://_SB_.PCI0.USB3 --=[ _SB.PCI0.USB3._S3D ]=-- Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } aml://_SB_.PCI0.USB3._PRW aml://_SB_.PCI0.USB3 --=[ _SB.PCI0.USB3._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } aml://_SB_.PCI0.USB3 aml://_SB_.PCI0 --=[ _SB.PCI0.USB3 ]=-- Device (USB3) { Name (_ADR, 0x00100002) OperationRegion (WAU3, PCI_Config, 0x84, One) Field (WAU3, ByteAcc, NoLock, Preserve) { U384, 8 } OperationRegion (UBP3, PCI_Config, 0x85, One) Field (UBP3, ByteAcc, NoLock, Preserve) { U3PE, 1 } Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } aml://_SB_.PCI0.USB4._S3D aml://_SB_.PCI0.USB4 --=[ _SB.PCI0.USB4._S3D ]=-- Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } aml://_SB_.PCI0.USB4._PRW aml://_SB_.PCI0.USB4 --=[ _SB.PCI0.USB4._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } aml://_SB_.PCI0.USB4 aml://_SB_.PCI0 --=[ _SB.PCI0.USB4 ]=-- Device (USB4) { Name (_ADR, 0x00100003) OperationRegion (WAU4, PCI_Config, 0x84, One) Field (WAU4, ByteAcc, NoLock, Preserve) { U484, 8 } OperationRegion (UBP4, PCI_Config, 0x85, One) Field (UBP4, ByteAcc, NoLock, Preserve) { U4PE, 1 } Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } aml://_SB_.PCI0.EHCI._PRW aml://_SB_.PCI0.EHCI --=[ _SB.PCI0.EHCI._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } aml://_SB_.PCI0.EHCI aml://_SB_.PCI0 --=[ _SB.PCI0.EHCI ]=-- Device (EHCI) { Name (_ADR, 0x00100004) OperationRegion (WAU5, PCI_Config, 0x84, One) Field (WAU5, ByteAcc, NoLock, Preserve) { U584, 8 } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } aml://_SB_.PCI0.P0PA._PRW aml://_SB_.PCI0.P0PA --=[ _SB.PCI0.P0PA._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } aml://_SB_.PCI0.P0PA._PRT aml://_SB_.PCI0.P0PA --=[ _SB.PCI0.P0PA._PRT ]=-- Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR0A) } Return (PR0A) } aml://_SB_.PCI0.P0PA.PCI1._PRW aml://_SB_.PCI0.P0PA.PCI1 --=[ _SB.PCI0.P0PA.PCI1._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } aml://_SB_.PCI0.P0PA.PCI1 aml://_SB_.PCI0.P0PA --=[ _SB.PCI0.P0PA.PCI1 ]=-- Device (PCI1) { Name (_ADR, 0x00060000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } aml://_SB_.PCI0.P0PA.PCI2._PRW aml://_SB_.PCI0.P0PA.PCI2 --=[ _SB.PCI0.P0PA.PCI2._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } aml://_SB_.PCI0.P0PA.PCI2 aml://_SB_.PCI0.P0PA --=[ _SB.PCI0.P0PA.PCI2 ]=-- Device (PCI2) { Name (_ADR, 0x00070000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } aml://_SB_.PCI0.P0PA.PCI3._PRW aml://_SB_.PCI0.P0PA.PCI3 --=[ _SB.PCI0.P0PA.PCI3._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } aml://_SB_.PCI0.P0PA.PCI3 aml://_SB_.PCI0.P0PA --=[ _SB.PCI0.P0PA.PCI3 ]=-- Device (PCI3) { Name (_ADR, 0x00080000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } aml://_SB_.PCI0.P0PA.PCI4._PRW aml://_SB_.PCI0.P0PA.PCI4 --=[ _SB.PCI0.P0PA.PCI4._PRW ]=-- Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } aml://_SB_.PCI0.P0PA.PCI4 aml://_SB_.PCI0.P0PA --=[ _SB.PCI0.P0PA.PCI4 ]=-- Device (PCI4) { Name (_ADR, 0x00090000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } aml://_SB_.PCI0.P0PA aml://_SB_.PCI0 --=[ _SB.PCI0.P0PA ]=-- Device (P0PA) { Name (_ADR, 0x00130001) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR0A) } Return (PR0A) } Device (PCI1) { Name (_ADR, 0x00060000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } Device (PCI2) { Name (_ADR, 0x00070000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } Device (PCI3) { Name (_ADR, 0x00080000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } Device (PCI4) { Name (_ADR, 0x00090000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } } aml://_SB_.PCI0 aml://_SB_ --=[ _SB.PCI0 ]=-- Device (PCI0) { Name (_HID, EisaId ("PNP0A03")) Name (_ADR, 0x00180000) Method (^BN00, 0, NotSerialized) { Return (Zero) } Method (_BBN, 0, NotSerialized) { Return (BN00 ()) } Name (_UID, Zero) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR00) } Return (PR00) } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } Method (NPTS, 1, NotSerialized) { } Method (NWAK, 1, NotSerialized) { } Device (VIAN) { Name (_ADR, Zero) } Device (NBF1) { Name (_ADR, One) } Device (NBF2) { Name (_ADR, 0x02) } Device (NBF3) { Name (_ADR, 0x03) } Device (NBF4) { Name (_ADR, 0x04) } Device (NBF5) { Name (_ADR, 0x05) } Device (NBF6) { Name (_ADR, 0x06) } Device (NBF7) { Name (_ADR, 0x07) } Device (P0P1) { Name (_ADR, 0x00010000) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR01) } Return (PR01) } } Device (NBPG) { Name (_ADR, 0x00020000) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR02) } Return (PR02) } } Device (NBP0) { Name (_ADR, 0x00030000) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR03) } Return (PR03) } } Device (NBP1) { Name (_ADR, 0x00030001) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR04) } Return (PR04) } } Device (NBP2) { Name (_ADR, 0x00030002) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR05) } Return (PR05) } } Device (NBP3) { Name (_ADR, 0x00030003) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR06) } Return (PR06) } } Device (SATA) { Name (_ADR, 0x000F0000) Name (REGF, One) Name (TIM0, Package (0x04) { Package (0x05) { 0x78, 0xB4, 0xF0, 0x017F, 0x0258 }, Package (0x05) { 0x20, 0x22, 0x33, 0x47, 0x5D }, Package (0x07) { 0x78, 0x50, 0x3C, 0x2D, 0x1E, 0x14, 0x0F }, Package (0x0F) { 0x06, 0x05, 0x04, 0x04, 0x03, 0x03, 0x02, 0x02, One, One, One, One, One, One, Zero } }) Name (TMD0, Buffer (0x14) {}) CreateDWordField (TMD0, Zero, PIO0) CreateDWordField (TMD0, 0x04, DMA0) CreateDWordField (TMD0, 0x08, PIO1) CreateDWordField (TMD0, 0x0C, DMA1) CreateDWordField (TMD0, 0x10, CHNF) Name (PMPT, 0x20) Name (PMUE, 0x07) Name (PMUT, Zero) Name (PSPT, 0x20) Name (PSUE, 0x07) Name (PSUT, Zero) Name (SMPT, 0x20) Name (SMUE, 0x07) Name (SMUT, Zero) Name (SSPT, 0x20) Name (SSUE, 0x07) Name (SSUT, Zero) OperationRegion (SAPR, PCI_Config, Zero, 0x3C) Field (SAPR, ByteAcc, NoLock, Preserve) { VID, 16, DID, 16, CMD, 3, Offset (0x0A), SCC, 8 } Method (_REG, 2, NotSerialized) { If (LEqual (Arg0, 0x02)) { Store (Arg1, REGF) } } Method (_STA, 0, NotSerialized) { If (LEqual (CMD, Zero)) { Return (0x0D) } Else { Return (0x0F) } } Device (CHN0) { Name (_ADR, Zero) Method (_STA, 0, NotSerialized) { If (LEqual (SCC, One)) { Return (0x0F) } Else { Return (Zero) } } Method (_GTM, 0, NotSerialized) { FZHD () Return (GTM (PMPT, PMUE, PMUT, PSPT, PSUE, PSUT)) } Method (_STM, 3, NotSerialized) { } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (Zero) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (Zero) } } } Device (CHN1) { Name (_ADR, One) Method (_STA, 0, NotSerialized) { If (LEqual (SCC, One)) { Return (0x0F) } Else { Return (Zero) } } Method (_GTM, 0, NotSerialized) { FZHD () Return (GTM (SMPT, SMUE, SMUT, SSPT, SSUE, SSUT)) } Method (_STM, 3, NotSerialized) { } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (Zero) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (Zero) } } } Method (GTM, 6, Serialized) { Store (Ones, PIO0) Store (Ones, PIO1) Store (Ones, DMA0) Store (Ones, DMA1) Store (0x10, CHNF) If (REGF) {} Else { Return (TMD0) } Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg0, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA0) Store (Local7, PIO0) Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg3, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA1) Store (Local7, PIO1) If (Arg1) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Arg2)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Local5)), DMA0) Or (CHNF, One, CHNF) } If (Arg4) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Arg5)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Local5)), DMA1) Or (CHNF, 0x04, CHNF) } Return (TMD0) } } Device (PATA) { Name (_ADR, 0x000F0001) Name (REGF, One) Method (_REG, 2, NotSerialized) { If (LEqual (Arg0, 0x02)) { Store (Arg1, REGF) } } Name (TIM0, Package (0x08) { Package (0x05) { 0x3C, 0x78, 0xB4, 0xF0, 0x0384 }, Package (0x05) { 0x11, 0x20, 0x31, 0x65, 0xA8 }, Package (0x10) { 0x06, 0x05, 0x04, 0x04, 0x03, 0x03, 0x02, 0x02, One, One, One, One, One, One, Zero, Zero }, Package (0x07) { 0x78, 0x5A, 0x3C, 0x2D, 0x1E, 0x14, 0x0F }, Package (0x07) { 0x0E, 0x08, 0x06, 0x04, 0x02, One, Zero }, Package (0x07) { Zero, Zero, Zero, One, One, One, One }, Package (0x05) { 0x05, 0x04, 0x03, 0x02, Zero }, Package (0x04) { 0x02, One, Zero, Zero } }) Name (TMD0, Buffer (0x14) {}) CreateDWordField (TMD0, Zero, PIO0) CreateDWordField (TMD0, 0x04, DMA0) CreateDWordField (TMD0, 0x08, PIO1) CreateDWordField (TMD0, 0x0C, DMA1) CreateDWordField (TMD0, 0x10, CHNF) OperationRegion (CFG2, PCI_Config, 0x40, 0x20) Field (CFG2, DWordAcc, NoLock, Preserve) { Offset (0x08), SSPT, 8, SMPT, 8, PSPT, 8, PMPT, 8, Offset (0x10), SSUT, 4, SSCR, 1, SSUE, 3, SMUT, 4, SMCR, 1, SMUE, 3, PSUT, 4, PSCR, 1, PSUE, 3, PMUT, 4, PMCR, 1, PMUE, 3 } Name (GMPT, Zero) Name (GMUE, Zero) Name (GMUT, Zero) Name (GMCR, Zero) Name (GSPT, Zero) Name (GSUE, Zero) Name (GSUT, Zero) Name (GSCR, Zero) Device (CHN0) { Name (_ADR, Zero) Method (_GTM, 0, NotSerialized) { FZHD () ShiftLeft (PSCR, One, Local1) Or (PMCR, Local1, Local0) Return (GTM (PMPT, PMUE, PMUT, PSPT, PSUE, PSUT, Local0)) } Method (_STM, 3, NotSerialized) { Store (Arg0, Debug) Store (Arg0, TMD0) Store (PMPT, GMPT) Store (PMUE, GMUE) Store (PMUT, GMUT) Store (PMCR, GMCR) Store (PSPT, GSPT) Store (PSUE, GSUE) Store (PSUT, GSUT) Store (PSCR, GSCR) STM () Store (GMPT, PMPT) Store (GMUE, PMUE) Store (GMUT, PMUT) Store (GMCR, PMCR) Store (GSPT, PSPT) Store (GSUE, PSUE) Store (GSUT, PSUT) Store (GSCR, PSCR) Store (GTF (Zero, Arg1), ATA0) Store (GTF (One, Arg2), ATA1) } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA0)) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA1)) } } } Device (CHN1) { Name (_ADR, One) Method (_GTM, 0, NotSerialized) { FZHD () ShiftLeft (SSCR, One, Local1) Or (SMCR, Local1, Local0) Return (GTM (SMPT, SMUE, SMUT, SSPT, SSUE, SSUT, Local0)) } Method (_STM, 3, NotSerialized) { Store (Arg0, Debug) Store (Arg0, TMD0) Store (SMPT, GMPT) Store (SMUE, GMUE) Store (SMUT, GMUT) Store (SMCR, GMCR) Store (SSPT, GSPT) Store (SSUE, GSUE) Store (SSUT, GSUT) Store (SSCR, GSCR) STM () Store (GMPT, SMPT) Store (GMUE, SMUE) Store (GMUT, SMUT) Store (GMCR, SMCR) Store (GSPT, SSPT) Store (GSUE, SSUE) Store (GSUT, SSUT) Store (GSCR, SSCR) Store (GTF (Zero, Arg1), ATA2) Store (GTF (One, Arg2), ATA3) } Device (DRV0) { Name (_ADR, Zero) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA2)) } } Device (DRV1) { Name (_ADR, One) Method (_GTF, 0, NotSerialized) { Return (RATA (ATA3)) } } } Method (GTM, 7, Serialized) { Store (Ones, PIO0) Store (Ones, PIO1) Store (Ones, DMA0) Store (Ones, DMA1) Store (0x10, CHNF) If (REGF) {} Else { Return (TMD0) } Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg0, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA0) Store (Local7, PIO0) Store (Match (DerefOf (Index (TIM0, One)), MEQ, Arg3, MTR, Zero, Zero), Local6) Store (DerefOf (Index (DerefOf (Index (TIM0, Zero)), Local6)), Local7) Store (Local7, DMA1) Store (Local7, PIO1) If (Arg1) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Arg2)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Local5)), DMA0) Or (CHNF, One, CHNF) } If (Arg4) { Store (DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Arg5)), Local5) Store (DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Local5)), DMA1) Or (CHNF, 0x04, CHNF) } Store (TMD0, Debug) Return (TMD0) } Method (STM, 0, Serialized) { If (REGF) { Store (Zero, GMUE) Store (0x07, GMUT) Store (Zero, GSUE) Store (0x07, GSUT) If (And (CHNF, One)) { Store (Match (DerefOf (Index (TIM0, 0x03)), MLE, DMA0, MTR, Zero, Zero), Local0) If (LGreater (Local0, 0x06)) { Store (0x06, Local0) } Store (DerefOf (Index (DerefOf (Index (TIM0, 0x04)), Local0)), GMUT) Or (GMUE, 0x07, GMUE) } Else { If (Or (LEqual (PIO0, Ones), LEqual (PIO0, Zero))) { If (And (LLess (DMA0, Ones), LGreater (DMA0, Zero))) { Store (DMA0, PIO0) } } } If (And (CHNF, 0x04)) { Store (Match (DerefOf (Index (TIM0, 0x03)), MLE, DMA1, MTR, Zero, Zero), Local0) If (LGreater (Local0, 0x06)) { Store (0x06, Local0) } Store (DerefOf (Index (DerefOf (Index (TIM0, 0x04)), Local0)), GSUT) Or (GSUE, 0x07, GSUE) } Else { If (Or (LEqual (PIO1, Ones), LEqual (PIO1, Zero))) { If (And (LLess (DMA1, Ones), LGreater (DMA1, Zero))) { Store (DMA1, PIO1) } } } And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIO0, MTR, Zero, Zero), 0x07, Local0) Store (DerefOf (Index (DerefOf (Index (TIM0, One)), Local0)), Local1) Store (Local1, GMPT) And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIO1, MTR, Zero, Zero), 0x07, Local0) Store (DerefOf (Index (DerefOf (Index (TIM0, One)), Local0)), Local1) Store (Local1, GSPT) } } Name (AT01, Buffer (0x07) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEF }) Name (AT02, Buffer (0x07) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90 }) Name (AT03, Buffer (0x07) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6 }) Name (AT04, Buffer (0x07) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x91 }) Name (ATA0, Buffer (0x1D) {}) Name (ATA1, Buffer (0x1D) {}) Name (ATA2, Buffer (0x1D) {}) Name (ATA3, Buffer (0x1D) {}) Name (ATAB, Buffer (0x1D) {}) CreateByteField (ATAB, Zero, CMDC) Method (GTFB, 3, Serialized) { Multiply (CMDC, 0x38, Local0) Add (Local0, 0x08, Local1) CreateField (ATAB, Local1, 0x38, CMDX) Multiply (CMDC, 0x07, Local0) CreateByteField (ATAB, Add (Local0, 0x02), A001) CreateByteField (ATAB, Add (Local0, 0x06), A005) Store (Arg0, CMDX) Store (Arg1, A001) Store (Arg2, A005) Increment (CMDC) } Method (GTF, 2, Serialized) { Store (Arg1, Debug) Store (Zero, CMDC) Name (ID49, 0x0C00) Name (ID59, Zero) Name (ID53, 0x04) Name (ID63, 0x0F00) Name (ID88, 0x0F00) Name (IRDY, One) Name (PIOT, Zero) Name (DMAT, Zero) If (LEqual (SizeOf (Arg1), 0x0200)) { CreateWordField (Arg1, 0x62, IW49) Store (IW49, ID49) CreateWordField (Arg1, 0x6A, IW53) Store (IW53, ID53) CreateWordField (Arg1, 0x7E, IW63) Store (IW63, ID63) CreateWordField (Arg1, 0x76, IW59) Store (IW59, ID59) CreateWordField (Arg1, 0xB0, IW88) Store (IW88, ID88) } Store (0xA0, Local7) If (Arg0) { Store (0xB0, Local7) And (CHNF, 0x08, IRDY) If (And (CHNF, 0x10)) { Store (PIO1, PIOT) } Else { Store (PIO0, PIOT) } If (And (CHNF, 0x04)) { If (And (CHNF, 0x10)) { Store (DMA1, DMAT) } Else { Store (DMA0, DMAT) } } } Else { And (CHNF, 0x02, IRDY) Store (PIO0, PIOT) If (And (CHNF, One)) { Store (DMA0, DMAT) } } If (LAnd (LAnd (And (ID53, 0x04), And (ID88, 0xFF00 )), DMAT)) { Store (Match (DerefOf (Index (TIM0, 0x03)), MLE, DMAT, MTR, Zero, Zero), Local1) If (LGreater (Local1, 0x06)) { Store (0x06, Local1) } GTFB (AT01, Or (0x40, Local1), Local7) } Else { If (LAnd (And (ID63, 0xFF00), PIOT)) { And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIOT, MTR, Zero, Zero), 0x03, Local0) Or (0x20, DerefOf (Index (DerefOf (Index (TIM0, 0x07)), Local0 )), Local1) GTFB (AT01, Local1, Local7) } } If (IRDY) { And (Match (DerefOf (Index (TIM0, Zero)), MGE, PIOT, MTR, Zero, Zero), 0x07, Local0) Or (0x08, DerefOf (Index (DerefOf (Index (TIM0, 0x06)), Local0 )), Local1) GTFB (AT01, Local1, Local7) } Else { If (And (ID49, 0x0400)) { GTFB (AT01, One, Local7) } } If (LAnd (And (ID59, 0x0100), And (ID59, 0xFF))) { GTFB (AT03, And (ID59, 0xFF), Local7) } Store (ATAB, Debug) Return (ATAB) } Method (RATA, 1, NotSerialized) { CreateByteField (Arg0, Zero, CMDN) Multiply (CMDN, 0x38, Local0) CreateField (Arg0, 0x08, Local0, RETB) Store (RETB, Debug) Return (RETB) } } Device (SBRG) { Name (_ADR, 0x00110000) Method (SPTS, 1, NotSerialized) { If (LAnd (LEqual (Arg0, 0x04), LEqual (OSFL (), 0x02))) { Sleep (0x0BB8) } If (LEqual (Arg0, One)) { While (WAKS) { Stall (0x50) Store (One, WAKS) } While (LNotEqual (PADS, Zero)) { Store (PADS, PADS) } Store (One, IRQR) Store (One, SUST) } If (LEqual (Arg0, 0x03)) { Store (Zero, SUST) } Store (One, SLPS) While (SLES) { Stall (0x50) Store (One, SLES) } Store (One, SLEE) } Method (SWAK, 1, NotSerialized) { If (LAnd (LEqual (Arg0, 0x03), PM5D)) {} Else { If (LAnd (LEqual (Arg0, One), PM5D)) {} Else { Notify (PWRB, 0x02) } } Store (Zero, PM5D) Store (One, PWBT) Store (Zero, SLEE) Store (Zero, ^^USB1.U184) Store (Zero, ^^USB2.U284) Store (Zero, ^^USB3.U384) Store (Zero, ^^USB4.U484) Store (Zero, ^^EHCI.U584) Store (Zero, SLPS) } OperationRegion (PMSR, SystemIO, PM5C, 0x02) Field (PMSR, ByteAcc, NoLock, Preserve) { Offset (0x01), PM5D, 1 } OperationRegion (PMS0, SystemIO, PMBS, 0x04) Field (PMS0, ByteAcc, NoLock, Preserve) { , 10, RTCS, 1, Offset (0x03), PWBT, 1, Offset (0x04) } OperationRegion (IOTP, SystemIO, PM28, 0x04) Field (IOTP, ByteAcc, NoLock, Preserve) { , 7, WAKS, 1, , 2, SLES, 1, , 4, PS1S, 1, , 10, SLEE, 1, , 4, PS1E, 1 } OperationRegion (PMGE, SystemIO, PMBS, 0x30) Field (PMGE, ByteAcc, NoLock, Preserve) { Offset (0x2A), , 7, IRQR, 1 } OperationRegion (PMPS, SystemIO, PMBS, 0x40) Field (PMPS, ByteAcc, NoLock, Preserve) { Offset (0x30), , 1, PADS, 7 } OperationRegion (HPRG, PCI_Config, 0x68, 0x04) Field (HPRG, ByteAcc, NoLock, Preserve) { , 7, HPTE, 1, HPTM, 24 } OperationRegion (BSR0, PCI_Config, 0x6F, One) Field (BSR0, ByteAcc, NoLock, Preserve) { , 7, RTCX, 1 } Name (PTBF, Buffer (0x03) { /* 0000 */ 0x00, 0x00, 0x00 }) CreateByteField (PTBF, One, PTB1) CreateByteField (PTBF, 0x02, PTB2) Scope (\_SB) { Name (SLPS, Zero) Device (SLPB) { Name (_HID, EisaId ("PNP0C0E")) Method (_STA, 0, NotSerialized) { If (LNotEqual (SUSW, 0xFF)) { Return (0x0F) } Return (Zero) } Method (SBEV, 0, NotSerialized) { If (SLPS) { Notify (SLPB, 0x02) } Else { Notify (SLPB, 0x80) } } Method (\_GPE._L04, 0, NotSerialized) { \_SB.SLPB.SBEV () } Method (_PRW, 0, NotSerialized) { Return (Package (0x02) { 0x04, 0x04 }) } } } Device (PIC) { Name (_HID, EisaId ("PNP0000")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x00, // Alignment 0x02, // Length ) IRQNoFlags () {2} }) } Device (DMAD) { Name (_HID, EisaId ("PNP0200")) Name (_CRS, ResourceTemplate () { DMA (Compatibility, BusMaster, Transfer8, ) {4} IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0087, // Range Minimum 0x0087, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0089, // Range Minimum 0x0089, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x008F, // Range Minimum 0x008F, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x00, // Alignment 0x20, // Length ) }) } Device (SPKR) { Name (_HID, EisaId ("PNP0800")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x00, // Alignment 0x01, // Length ) }) } Device (COPR) { Name (_HID, EisaId ("PNP0C04")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x00, // Alignment 0x10, // Length ) IRQNoFlags () {13} }) } Device (FDC) { Name (_HID, EisaId ("PNP0700")) Method (_FDE, 0, NotSerialized) { Name (FDEP, Package (0x05) { Zero, Zero, 0x02, 0x02, 0x02 }) If (_STA ()) { Store (One, Index (FDEP, Zero)) } Return (FDEP) } Method (_STA, 0, NotSerialized) { Return (DSTA (0x03)) } Method (_DIS, 0, NotSerialized) { DCNT (0x03, Zero) } Method (_CRS, 0, NotSerialized) { DCRS (0x03, One) Store (IRQM, IRQE) Store (DMAM, DMAE) Store (IO11, IO21) Store (IO12, IO22) Store (0x06, LEN2) Add (IO21, 0x07, IO31) Store (IO31, IO32) Store (One, LEN3) Return (CRS2) } Method (_SRS, 1, NotSerialized) { DSRS (Arg0, 0x03) CreateWordField (Arg0, 0x11, IRQE) CreateByteField (Arg0, 0x14, DMAE) ENFG (CGLD (0x03)) If (IRQE) { FindSetRightBit (IRQE, Local0) Subtract (Local0, One, INTR) } Else { Store (Zero, INTR) } If (DMAE) { FindSetRightBit (DMAE, Local0) Subtract (Local0, One, DMCH) } Else { Store (0x04, DMCH) } EXFG () } Name (_PRS, ResourceTemplate () { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x03F0, // Range Minimum 0x03F0, // Range Maximum 0x01, // Alignment 0x06, // Length ) IO (Decode16, 0x03F7, // Range Minimum 0x03F7, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {6} DMA (Compatibility, NotBusMaster, Transfer8, ) {2} } StartDependentFnNoPri () { IO (Decode16, 0x03F0, // Range Minimum 0x03F0, // Range Maximum 0x01, // Alignment 0x06, // Length ) IO (Decode16, 0x03F7, // Range Minimum 0x03F7, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x0370, // Range Minimum 0x0370, // Range Maximum 0x01, // Alignment 0x06, // Length ) IO (Decode16, 0x0377, // Range Minimum 0x0377, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } EndDependentFn () }) } Device (LPTE) { Method (_HID, 0, NotSerialized) { If (LPTM (0x02)) { Return (0x0104D041) } Else { Return (0x0004D041) } } Method (_STA, 0, NotSerialized) { Return (DSTA (0x02)) } Method (_DIS, 0, NotSerialized) { DCNT (0x02, Zero) } Method (_CRS, 0, NotSerialized) { DCRS (0x02, One) If (LPTM (0x02)) { Store (IRQM, IRQE) Store (DMAM, DMAE) Store (IO11, IO21) Store (IO12, IO22) Store (LEN1, LEN2) Add (IO21, 0x0400, IO31) Store (IO31, IO32) Store (LEN2, LEN3) Return (CRS2) } Else { Return (CRS1) } } Method (_SRS, 1, NotSerialized) { DSRS (Arg0, 0x02) } Method (_PRS, 0, NotSerialized) { If (LPTM (0x02)) { Return (EPPR) } Else { Return (LPPR) } } Name (LPPR, ResourceTemplate () { StartDependentFnNoPri () { IO (Decode16, 0x0378, // Range Minimum 0x0378, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x0278, // Range Minimum 0x0278, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03BC, // Range Minimum 0x03BC, // Range Maximum 0x01, // Alignment 0x04, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } EndDependentFn () }) Name (EPPR, ResourceTemplate () { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x0378, // Range Minimum 0x0378, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0778, // Range Minimum 0x0778, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {7} DMA (Compatibility, NotBusMaster, Transfer8, ) {3} } StartDependentFnNoPri () { IO (Decode16, 0x0378, // Range Minimum 0x0378, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0778, // Range Minimum 0x0778, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x0278, // Range Minimum 0x0278, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0678, // Range Minimum 0x0678, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x03BC, // Range Minimum 0x03BC, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x07BC, // Range Minimum 0x07BC, // Range Maximum 0x01, // Alignment 0x04, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } EndDependentFn () }) } Device (SIOR) { Name (_HID, EisaId ("PNP0C02")) Method (_UID, 0, NotSerialized) { Return (SPIO) } Name (CRS, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y00) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y01) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y02) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y03) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y04) }) Method (_CRS, 0, NotSerialized) { If (LAnd (LNotEqual (SPIO, 0x03F0), LGreater (SPIO, 0xF0))) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MIN, GP10) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._MAX, GP11) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y00._LEN, GPL1) Store (SPIO, GP10) Store (SPIO, GP11) Store (0x02, GPL1) } If (IOPB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MIN, GP20) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._MAX, GP21) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y01._LEN, GPL2) Store (IOPB, GP20) Store (IOPB, GP21) Store (IOPL, GPL2) } If (IOEB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MIN, GP30) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._MAX, GP31) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y02._LEN, GPL3) Store (IOEB, GP30) Store (IOEB, GP31) Store (IOEL, GPL3) } If (IOGB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._MIN, GP40) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._MAX, GP41) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y03._LEN, GPL4) Store (IOGB, GP40) Store (IOGB, GP41) Store (IOGL, GPL4) } If (IODB) { CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._MIN, GP50) CreateWordField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._MAX, GP51) CreateByteField (CRS, \_SB.PCI0.SBRG.SIOR._Y04._LEN, GPL5) Store (IODB, GP50) Store (IODB, GP51) Store (IODL, GPL5) } Return (CRS) } } Name (DCAT, Package (0x16) { One, 0x02, 0x03, Zero, 0xFF, 0x08, 0xFF, 0xFF, 0x09, 0xFF, 0x05, 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0x0A, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }) Name (IKEY, Package (0x02) { Package (0x04) { 0x87, One, 0x55, 0x55 }, Package (0x04) { 0x87, One, 0x55, 0xAA } }) Name (KBFG, One) Name (MSFG, One) Name (UR1F, One) Method (ENFG, 1, NotSerialized) { Store (Zero, Local1) If (LEqual (SPIO, 0x2E)) { Store (Zero, Local1) } If (LEqual (SPIO, 0x4E)) { Store (One, Local1) } Store (Zero, Local0) While (LNotEqual (Local0, 0x04)) { Store (DerefOf (Index (DerefOf (Index (IKEY, Local1)), Local0)), INDX) Increment (Local0) } Store (Arg0, LDN) } Method (ENTR, 0, NotSerialized) { Store (0x87, INDX) Store (One, INDX) Store (0x55, INDX) If (LEqual (SPIO, 0x2E)) { Store (0x55, INDX) } Else { Store (0xAA, INDX) } } Method (EXFG, 0, NotSerialized) { Store (0x02, INDX) Store (0x02, DATA) } Method (LPTM, 1, NotSerialized) { ENFG (CGLD (Arg0)) And (OPT0, 0x02, Local0) EXFG () Return (Local0) } Method (UHID, 1, NotSerialized) { ENFG (CGLD (Arg0)) And (OPT0, 0x70, Local0) EXFG () If (Local0) { Return (0x1005D041) } Return (0x0105D041) } Method (ORF0, 1, NotSerialized) { ENTR () Or (OPT0, Arg0, OPT0) EXFG () } Method (ORF1, 1, NotSerialized) { ENTR () Or (OPT1, Arg0, OPT1) EXFG () } Method (ORF2, 1, NotSerialized) { ENTR () Or (OPT2, Arg0, OPT2) EXFG () } Method (ANF0, 1, NotSerialized) { ENTR () And (OPT0, Arg0, OPT0) EXFG () } Method (ANF2, 1, NotSerialized) { ENTR () And (OPT2, Arg0, OPT2) EXFG () } Method (ANF4, 1, NotSerialized) { ENTR () And (OPT4, Arg0, OPT4) EXFG () } Method (STF0, 1, NotSerialized) { ENTR () Store (Arg0, OPT0) EXFG () } Method (STF1, 1, NotSerialized) { ENTR () Store (Arg0, OPT1) EXFG () } Method (SIOS, 1, NotSerialized) { Store ("SIOS", Debug) Store (Zero, GP10) If (LLess (Arg0, 0x05)) { ENFG (0x04) Store (One, ACTR) EXFG () ANF4 (0xFC) ORF1 (0x18) If (KBFG) { ORF0 (0x08) } Else { ANF0 (0xF7) } If (MSFG) { ORF0 (0x10) } Else { ANF0 (0xEF) ENFG (0x06) Store (Zero, ACTR) EXFG () } ENFG (0x04) ANF2 (0xF0) ENFG (0x07) And (OPF9, 0xFE, OPF9) And (OPC0, 0xFE, OPC0) And (OPC3, 0xFE, OPC3) And (OP29, 0xEF, OP29) EXFG () } Else { ENFG (0x07) And (OPC0, Zero, OPC0) Or (OPC0, One, OPC0) And (OPC3, Zero, OPC3) Or (OPC3, One, OPC3) Or (OPF9, One, OPF9) And (OP29, 0xEF, OP29) EXFG () } } Method (SIOW, 1, NotSerialized) { Store (One, GP10) Store (One, GP40) Store ("SIOW", Debug) ENFG (0x04) Store (Zero, ACTR) EXFG () STF0 (Zero) STF1 (0xFF) ENFG (0x07) Or (OP29, 0x10, OP29) Or (OPC0, One, OPC0) Or (OPC3, One, OPC3) EXFG () ENFG (0x05) Or (ACTR, One, ACTR) EXFG () ENFG (0x06) Or (ACTR, One, ACTR) EXFG () ENFG (0x04) Store (One, ACTR) EXFG () } Method (SIOH, 0, NotSerialized) { Store ("SIOH", Debug) } OperationRegion (IOID, SystemIO, SPIO, 0x02) Field (IOID, ByteAcc, NoLock, Preserve) { INDX, 8, DATA, 8 } IndexField (INDX, DATA, ByteAcc, NoLock, Preserve) { Offset (0x07), LDN, 8, Offset (0x29), OP29, 8, Offset (0x30), ACTR, 8, Offset (0x60), IOAH, 8, IOAL, 8, IOH2, 8, IOL2, 8, Offset (0x70), INTR, 8, Offset (0x74), DMCH, 8, Offset (0xC0), OPC0, 8, OPC1, 8, OPC2, 8, OPC3, 8, Offset (0xF0), OPT0, 8, OPT1, 8, OPT2, 8, OPT3, 8, OPT4, 8, Offset (0xF8), OPF8, 8, OPF9, 8, OPFA, 8, OPFB, 8 } Method (CGLD, 1, NotSerialized) { Return (DerefOf (Index (DCAT, Arg0))) } Method (DSTA, 1, NotSerialized) { ENFG (CGLD (Arg0)) Store (ACTR, Local0) EXFG () If (LEqual (Local0, 0xFF)) { Return (Zero) } And (Local0, One, Local0) Or (IOST, ShiftLeft (Local0, Arg0), IOST) If (Local0) { Return (0x0F) } Else { If (And (ShiftLeft (One, Arg0), IOST)) { Return (0x0D) } Else { Return (Zero) } } } Method (DCNT, 2, NotSerialized) { ENFG (CGLD (Arg0)) ShiftLeft (IOAH, 0x08, Local1) Or (IOAL, Local1, Local1) RRIO (Arg0, Arg1, Local1, 0x08) If (LAnd (LLess (DMCH, 0x04), LNotEqual (And (DMCH, 0x03, Local1), Zero))) { RDMA (Arg0, Arg1, Increment (Local1)) } Store (Arg1, ACTR) EXFG () } Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y07) IRQNoFlags (_Y05) {} DMA (Compatibility, NotBusMaster, Transfer8, _Y06) {} }) CreateWordField (CRS1, \_SB.PCI0.SBRG._Y05._INT, IRQM) CreateByteField (CRS1, \_SB.PCI0.SBRG._Y06._DMA, DMAM) CreateWordField (CRS1, \_SB.PCI0.SBRG._Y07._MIN, IO11) CreateWordField (CRS1, \_SB.PCI0.SBRG._Y07._MAX, IO12) CreateByteField (CRS1, \_SB.PCI0.SBRG._Y07._LEN, LEN1) Name (CRS2, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y0A) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x00, // Length _Y0B) IRQNoFlags (_Y08) {6} DMA (Compatibility, NotBusMaster, Transfer8, _Y09) {2} }) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y08._INT, IRQE) CreateByteField (CRS2, \_SB.PCI0.SBRG._Y09._DMA, DMAE) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y0A._MIN, IO21) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y0A._MAX, IO22) CreateByteField (CRS2, \_SB.PCI0.SBRG._Y0A._LEN, LEN2) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y0B._MIN, IO31) CreateWordField (CRS2, \_SB.PCI0.SBRG._Y0B._MAX, IO32) CreateByteField (CRS2, \_SB.PCI0.SBRG._Y0B._LEN, LEN3) Method (DCRS, 2, NotSerialized) { ENFG (CGLD (Arg0)) ShiftLeft (IOAH, 0x08, IO11) Or (IOAL, IO11, IO11) Store (IO11, IO12) Subtract (FindSetRightBit (IO11), One, Local0) ShiftLeft (One, Local0, LEN1) If (INTR) { ShiftLeft (One, INTR, IRQM) } Else { Store (Zero, IRQM) } If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero))) { Store (Zero, DMAM) } Else { And (DMCH, 0x03, Local1) ShiftLeft (One, Local1, DMAM) } EXFG () Return (CRS1) } Method (DSRS, 2, NotSerialized) { CreateWordField (Arg0, 0x09, IRQM) CreateByteField (Arg0, 0x0C, DMAM) CreateWordField (Arg0, 0x02, IO11) ENFG (CGLD (Arg1)) And (IO11, 0xFF, IOAL) ShiftRight (IO11, 0x08, IOAH) If (IRQM) { FindSetRightBit (IRQM, Local0) Subtract (Local0, One, INTR) } Else { Store (Zero, INTR) } If (DMAM) { FindSetRightBit (DMAM, Local0) Subtract (Local0, One, DMCH) } Else { Store (0x04, DMCH) } EXFG () DCNT (Arg1, One) } OperationRegion (GPIO, SystemIO, IO1B, 0x04) Field (GPIO, ByteAcc, NoLock, Preserve) { GP10, 1, GP11, 1, GP12, 1, GP13, 1, GO14, 1, GO15, 1, GO16, 1, GO17, 1, GP20, 1, GP21, 1, GP22, 1, GP23, 1, GO24, 1, GO25, 1, GO26, 1, GO27, 1, GP30, 1, GP31, 1, GP32, 1, GP33, 1, GO34, 1, GO35, 1, GO36, 1, GO37, 1, GP40, 1, GP41, 1, GP42, 1, GP43, 1, GO44, 1, GO45, 1, GO46, 1, GO47, 1 } Device (NBRM) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x99) Name (CRS, ResourceTemplate () { }) Method (_CRS, 0, NotSerialized) { Return (CRS) } } Device (RMSC) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x10) Name (CRS, ResourceTemplate () { IO (Decode16, 0x0010, // Range Minimum 0x0010, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x0022, // Range Minimum 0x0022, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x0044, // Range Minimum 0x0044, // Range Maximum 0x00, // Alignment 0x1C, // Length ) IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x00, // Alignment 0x0B, // Length ) IO (Decode16, 0x0072, // Range Minimum 0x0072, // Range Maximum 0x00, // Alignment 0x0E, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0084, // Range Minimum 0x0084, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0088, // Range Minimum 0x0088, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x008C, // Range Minimum 0x008C, // Range Maximum 0x00, // Alignment 0x03, // Length ) IO (Decode16, 0x0090, // Range Minimum 0x0090, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x00A2, // Range Minimum 0x00A2, // Range Maximum 0x00, // Alignment 0x1E, // Length ) IO (Decode16, 0x00E0, // Range Minimum 0x00E0, // Range Maximum 0x00, // Alignment 0x10, // Length ) IO (Decode16, 0x03E0, // Range Minimum 0x03E0, // Range Maximum 0x00, // Alignment 0x08, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x00, // Alignment 0x02, // Length ) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y0C) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y0D) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x00, // Alignment 0x00, // Length _Y0E) }) Method (_CRS, 0, NotSerialized) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MIN, GP00) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._MAX, GP01) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0C._LEN, GP0L) Store (PMBS, GP00) Store (PMBS, GP01) Store (PMLN, GP0L) If (SMBS) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._MIN, GP10) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._MAX, GP11) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0D._LEN, GP1L) Store (SMBS, GP10) Store (SMBS, GP11) Store (SMBL, GP1L) } If (GPBS) { CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._MIN, GP20) CreateWordField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._MAX, GP21) CreateByteField (CRS, \_SB.PCI0.SBRG.RMSC._Y0E._LEN, GP2L) Store (GPBS, GP20) Store (GPBS, GP21) Store (GPLN, GP2L) } Return (CRS) } } Scope (\_SB.PCI0.SBRG) { Device (ASOC) { Name (_HID, "ATK0110") Name (_UID, 0x01010110) Method (_STA, 0, NotSerialized) { Return (0x0F) } Name (MBIF, Package (0x08) { One, "M2V", One, Zero, Zero, Zero, Zero, Zero }) Method (ASIF, 0, NotSerialized) { Return (MBIF) } } } Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_UID, Zero) Name (CRS0, ResourceTemplate () { }) Name (CRS1, ResourceTemplate () { Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y0F) IRQNoFlags () {0} IRQNoFlags () {8} }) Method (_STA, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (Zero) } Else { Return (0x0F) } } OperationRegion (DBHP, SystemIO, 0x98, 0x04) Field (DBHP, DWordAcc, NoLock, Preserve) { DB98, 32 } Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS1, \_SB.PCI0.SBRG.HPET._Y0F._BAS, BAS1) CreateDWordField (CRS1, \_SB.PCI0.SBRG.HPET._Y0F._LEN, LEN1) If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { ShiftLeft (HPTM, 0x08, DB98) ShiftLeft (HPTM, 0x08, BAS1) Store (0x0400, LEN1) Return (CRS1) } } } Device (TMR) { Name (_HID, EisaId ("PNP0100")) Name (CRS0, ResourceTemplate () { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x00, // Alignment 0x04, // Length ) IRQNoFlags () {0} }) Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x00, // Alignment 0x04, // Length ) }) Method (_CRS, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { Return (CRS1) } } } Device (RTC0) { Name (_HID, EisaId ("PNP0B00")) Name (CRS0, ResourceTemplate () { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x00, // Alignment 0x02, // Length ) IRQNoFlags () {8} }) Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x00, // Alignment 0x02, // Length ) }) Method (_CRS, 0, NotSerialized) { If (LNotEqual (HPTE, One)) { Return (CRS0) } Else { Return (CRS1) } } } Scope (\) { OperationRegion (RAMW, SystemMemory, Subtract (TOPM, 0x00010000), 0x00010000) Field (RAMW, ByteAcc, NoLock, Preserve) { PAR0, 32, PAR1, 32 } OperationRegion (IOB2, SystemIO, 0x082F, 0x02) Field (IOB2, ByteAcc, NoLock, Preserve) { SMIC, 8, SMIS, 8 } Method (ISMI, 1, Serialized) { Store (Arg0, SMIC) } Method (GNVS, 1, Serialized) { Store (Arg0, PAR0) ISMI (0x70) Return (PAR1) } Method (SNVS, 2, Serialized) { Store (Arg0, PAR0) Store (Arg1, PAR1) ISMI (0x71) } } Scope (\) { Field (RAMW, ByteAcc, NoLock, Preserve) { Offset (0x28), AWEN, 1 } } Scope (\_SB) { Device (\AWY) { Name (_HID, "AWY0001") Method (SMOD, 1, NotSerialized) { } Method (_STA, 0, NotSerialized) { If (AWEN) { Return (0x0F) } Return (Zero) } } } Device (^PCIE) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x11) Name (CRS, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xE0000000, // Address Base 0x10000000, // Address Length _Y10) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._BAS, BAS1) CreateDWordField (CRS, \_SB.PCI0.PCIE._Y10._LEN, LEN1) Store (PCIB, BAS1) Store (PCIL, LEN1) Return (CRS) } } Device (OMSC) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, Zero) Name (CRS, ResourceTemplate () { Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y11) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y12) }) Method (_CRS, 0, NotSerialized) { If (APIC) { CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._LEN, ML01) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y11._BAS, MB01) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._LEN, ML02) CreateDWordField (CRS, \_SB.PCI0.SBRG.OMSC._Y12._BAS, MB02) Store (0xFEC00000, MB01) Store (0x1000, ML01) Store (0xFEE00000, MB02) Store (0x1000, ML02) } Return (CRS) } } Device (^^RMEM) { Name (_HID, EisaId ("PNP0C01")) Name (_UID, One) Name (CRS, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x000A0000, // Address Length ) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y13) Memory32Fixed (ReadOnly, 0x000E0000, // Address Base 0x00020000, // Address Length _Y14) Memory32Fixed (ReadWrite, 0x00100000, // Address Base 0x00000000, // Address Length _Y15) Memory32Fixed (ReadOnly, 0x00000000, // Address Base 0x00000000, // Address Length _Y16) }) Method (_CRS, 0, NotSerialized) { CreateDWordField (CRS, \_SB.RMEM._Y13._BAS, BAS1) CreateDWordField (CRS, \_SB.RMEM._Y13._LEN, LEN1) CreateDWordField (CRS, \_SB.RMEM._Y14._BAS, BAS2) CreateDWordField (CRS, \_SB.RMEM._Y14._LEN, LEN2) CreateDWordField (CRS, \_SB.RMEM._Y15._LEN, LEN3) CreateDWordField (CRS, \_SB.RMEM._Y16._BAS, BAS4) CreateDWordField (CRS, \_SB.RMEM._Y16._LEN, LEN4) If (OSFL ()) {} Else { If (MG1B) { If (LGreater (MG1B, 0x000C0000)) { Store (0x000C0000, BAS1) Subtract (MG1B, BAS1, LEN1) } } Else { Store (0x000C0000, BAS1) Store (0x00020000, LEN1) } If (Add (MG1B, MG1L, Local0)) { Store (Local0, BAS2) Subtract (0x00100000, BAS2, LEN2) } } Subtract (MG2B, 0x00100000, LEN3) Add (MG2B, MG2L, BAS4) Subtract (Zero, BAS4, LEN4) Return (CRS) } } Device (UAR1) { Name (_UID, One) Method (_HID, 0, NotSerialized) { Return (UHID (Zero)) } Method (_STA, 0, NotSerialized) { Return (DSTA (Zero)) } Method (_DIS, 0, NotSerialized) { DCNT (Zero, Zero) } Method (_CRS, 0, NotSerialized) { Return (DCRS (Zero, One)) } Method (_SRS, 1, NotSerialized) { DSRS (Arg0, Zero) } Method (_PRS, 0, NotSerialized) { Return (CMPR) } Name (CMPR, ResourceTemplate () { StartDependentFn (0x00, 0x00) { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {4} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x02F8, // Range Minimum 0x02F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03E8, // Range Minimum 0x03E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x02E8, // Range Minimum 0x02E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {} } StartDependentFnNoPri () { IO (Decode16, 0x03F8, // Range Minimum 0x03F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x02F8, // Range Minimum 0x02F8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x03E8, // Range Minimum 0x03E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } StartDependentFnNoPri () { IO (Decode16, 0x02E8, // Range Minimum 0x02E8, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {3,4,5,6,7,10,11,12} DMA (Compatibility, NotBusMaster, Transfer8, ) {0,1,2,3} } EndDependentFn () }) } Method (UAR1._PRW, 0, NotSerialized) { Return (GPRW (0x08, 0x04)) } Device (PS2K) { Name (_HID, EisaId ("PNP0303")) Name (_CID, 0x0B03D041) Method (_STA, 0, NotSerialized) { ShiftLeft (One, 0x0A, Local0) If (And (IOST, Local0)) { Return (0x0F) } Return (Zero) } Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x00, // Alignment 0x01, // Length ) IRQNoFlags () {1} }) } Method (PS2K._PRW, 0, NotSerialized) { Return (GPRW (0x02, 0x04)) } Device (PS2M) { Name (_HID, EisaId ("PNP0F03")) Name (_CID, 0x130FD041) Method (_STA, 0, NotSerialized) { ShiftLeft (One, 0x0C, Local0) If (And (IOST, Local0)) { Return (0x0F) } Return (Zero) } Name (_CRS, ResourceTemplate () { IRQNoFlags () {12} }) } Method (PS2M._PRW, 0, NotSerialized) { Return (GPRW (0x09, 0x04)) } } Device (SVLK) { Name (_ADR, 0x00110007) } Device (P0P9) { Name (_ADR, 0x00130000) Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR09) } Return (PR09) } Device (HDAC) { Name (_ADR, 0x00010000) } } Device (USB1) { Name (_ADR, 0x00100000) OperationRegion (WAU1, PCI_Config, 0x84, One) Field (WAU1, ByteAcc, NoLock, Preserve) { U184, 8 } OperationRegion (U1D3, PCI_Config, 0x49, One) Field (U1D3, ByteAcc, NoLock, Preserve) { UR49, 3 } OperationRegion (UBP1, PCI_Config, 0x85, One) Field (UBP1, ByteAcc, NoLock, Preserve) { U1PE, 1 } Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } Device (USB2) { Name (_ADR, 0x00100001) OperationRegion (WAU2, PCI_Config, 0x84, One) Field (WAU2, ByteAcc, NoLock, Preserve) { U284, 8 } OperationRegion (UBP2, PCI_Config, 0x85, One) Field (UBP2, ByteAcc, NoLock, Preserve) { U2PE, 1 } Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } Device (USB3) { Name (_ADR, 0x00100002) OperationRegion (WAU3, PCI_Config, 0x84, One) Field (WAU3, ByteAcc, NoLock, Preserve) { U384, 8 } OperationRegion (UBP3, PCI_Config, 0x85, One) Field (UBP3, ByteAcc, NoLock, Preserve) { U3PE, 1 } Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } Device (USB4) { Name (_ADR, 0x00100003) OperationRegion (WAU4, PCI_Config, 0x84, One) Field (WAU4, ByteAcc, NoLock, Preserve) { U484, 8 } OperationRegion (UBP4, PCI_Config, 0x85, One) Field (UBP4, ByteAcc, NoLock, Preserve) { U4PE, 1 } Method (_S3D, 0, NotSerialized) { If (LOr (LEqual (OSFL (), One), LEqual (OSFL (), 0x02))) { Return (0x02) } Else { Return (0x03) } } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } Device (EHCI) { Name (_ADR, 0x00100004) OperationRegion (WAU5, PCI_Config, 0x84, One) Field (WAU5, ByteAcc, NoLock, Preserve) { U584, 8 } Method (_PRW, 0, NotSerialized) { Return (GPRW (0x0E, 0x04)) } } Device (P0PA) { Name (_ADR, 0x00130001) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } Method (_PRT, 0, NotSerialized) { If (PICM) { Return (AR0A) } Return (PR0A) } Device (PCI1) { Name (_ADR, 0x00060000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } Device (PCI2) { Name (_ADR, 0x00070000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } Device (PCI3) { Name (_ADR, 0x00080000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } Device (PCI4) { Name (_ADR, 0x00090000) Method (_PRW, 0, NotSerialized) { Return (GPRW (0x05, 0x04)) } } } } aml://\_GPE._L05 aml://\_GPE --=[ \_GPE._L05 ]=-- Method (_L05, 0, NotSerialized) { Notify (\_SB.PCI0, 0x02) Notify (\_SB.PCI0.P0PA, 0x02) Notify (\_SB.PCI0.P0PA.PCI1, 0x02) Notify (\_SB.PCI0.P0PA.PCI2, 0x02) Notify (\_SB.PCI0.P0PA.PCI3, 0x02) Notify (\_SB.PCI0.P0PA.PCI4, 0x02) Notify (\_SB.PWRB, 0x02) } aml://\_GPE._L08 aml://\_GPE --=[ \_GPE._L08 ]=-- Method (_L08, 0, NotSerialized) { \_SB.PCI0.SBRG.SIOH () } aml://\_GPE._L02 aml://\_GPE --=[ \_GPE._L02 ]=-- Method (_L02, 0, NotSerialized) { \_SB.PCI0.SBRG.SIOH () } aml://\_GPE._L09 aml://\_GPE --=[ \_GPE._L09 ]=-- Method (_L09, 0, NotSerialized) { \_SB.PCI0.SBRG.SIOH () } aml://\_GPE._L0E aml://\_GPE --=[ \_GPE._L0E ]=-- Method (_L0E, 0, NotSerialized) { Notify (\_SB.PCI0.USB1, 0x02) Notify (\_SB.PCI0.USB2, 0x02) Notify (\_SB.PCI0.USB3, 0x02) Notify (\_SB.PCI0.USB4, 0x02) Notify (\_SB.PCI0.EHCI, 0x02) Notify (\_SB.PWRB, 0x02) } aml://\_GPE --=[ \_GPE ]=-- Scope (\_GPE) { Method (_L05, 0, NotSerialized) { Notify (\_SB.PCI0, 0x02) Notify (\_SB.PCI0.P0PA, 0x02) Notify (\_SB.PCI0.P0PA.PCI1, 0x02) Notify (\_SB.PCI0.P0PA.PCI2, 0x02) Notify (\_SB.PCI0.P0PA.PCI3, 0x02) Notify (\_SB.PCI0.P0PA.PCI4, 0x02) Notify (\_SB.PWRB, 0x02) } Method (_L08, 0, NotSerialized) { \_SB.PCI0.SBRG.SIOH () } Method (_L02, 0, NotSerialized) { \_SB.PCI0.SBRG.SIOH () } Method (_L09, 0, NotSerialized) { \_SB.PCI0.SBRG.SIOH () } Method (_L0E, 0, NotSerialized) { Notify (\_SB.PCI0.USB1, 0x02) Notify (\_SB.PCI0.USB2, 0x02) Notify (\_SB.PCI0.USB3, 0x02) Notify (\_SB.PCI0.USB4, 0x02) Notify (\_SB.PCI0.EHCI, 0x02) Notify (\_SB.PWRB, 0x02) } } aml://_SB_.PWRB aml://_SB_ --=[ _SB.PWRB ]=-- Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) Name (_UID, 0xAA) Name (_STA, 0x0B) } aml://_SB --=[ _SB ]=-- aml://_SB_.LNKA._STA aml://_SB_.LNKA --=[ _SB.LNKA._STA ]=-- Method (_STA, 0, NotSerialized) { Store (PIRA, IRQA) If (PIRA) { Return (0x0B) } Else { Return (0x09) } } aml://_SB_.LNKA._PRS aml://_SB_.LNKA --=[ _SB.LNKA._PRS ]=-- Method (_PRS, 0, NotSerialized) { Return (PRSA) } aml://_SB_.LNKA._DIS aml://_SB_.LNKA --=[ _SB.LNKA._DIS ]=-- Method (_DIS, 0, NotSerialized) { Store (Zero, PIRA) } aml://_SB_.LNKA._CRS aml://_SB_.LNKA --=[ _SB.LNKA._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQA, IRA0) Return (ICRS) } aml://_SB_.LNKA._SRS aml://_SB_.LNKA --=[ _SB.LNKA._SRS ]=-- Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRA) Store (PIRA, IRQA) } aml://_SB_.LNKA aml://_SB_ --=[ _SB.LNKA ]=-- Device (LNKA) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, One) Method (_STA, 0, NotSerialized) { Store (PIRA, IRQA) If (PIRA) { Return (0x0B) } Else { Return (0x09) } } Method (_PRS, 0, NotSerialized) { Return (PRSA) } Method (_DIS, 0, NotSerialized) { Store (Zero, PIRA) } Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQA, IRA0) Return (ICRS) } Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRA) Store (PIRA, IRQA) } } aml://_SB_.LNKB._STA aml://_SB_.LNKB --=[ _SB.LNKB._STA ]=-- Method (_STA, 0, NotSerialized) { Store (PIRB, IRQB) If (PIRB) { Return (0x0B) } Else { Return (0x09) } } aml://_SB_.LNKB._PRS aml://_SB_.LNKB --=[ _SB.LNKB._PRS ]=-- Method (_PRS, 0, NotSerialized) { Return (PRSB) } aml://_SB_.LNKB._DIS aml://_SB_.LNKB --=[ _SB.LNKB._DIS ]=-- Method (_DIS, 0, NotSerialized) { Store (Zero, PIRB) } aml://_SB_.LNKB._CRS aml://_SB_.LNKB --=[ _SB.LNKB._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQB, IRA0) Return (ICRS) } aml://_SB_.LNKB._SRS aml://_SB_.LNKB --=[ _SB.LNKB._SRS ]=-- Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRB) Store (PIRB, IRQB) } aml://_SB_.LNKB aml://_SB_ --=[ _SB.LNKB ]=-- Device (LNKB) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x02) Method (_STA, 0, NotSerialized) { Store (PIRB, IRQB) If (PIRB) { Return (0x0B) } Else { Return (0x09) } } Method (_PRS, 0, NotSerialized) { Return (PRSB) } Method (_DIS, 0, NotSerialized) { Store (Zero, PIRB) } Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQB, IRA0) Return (ICRS) } Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRB) Store (PIRB, IRQB) } } aml://_SB_.LNKC._STA aml://_SB_.LNKC --=[ _SB.LNKC._STA ]=-- Method (_STA, 0, NotSerialized) { Store (PIRC, IRQC) If (PIRC) { Return (0x0B) } Else { Return (0x09) } } aml://_SB_.LNKC._PRS aml://_SB_.LNKC --=[ _SB.LNKC._PRS ]=-- Method (_PRS, 0, NotSerialized) { Return (PRSC) } aml://_SB_.LNKC._DIS aml://_SB_.LNKC --=[ _SB.LNKC._DIS ]=-- Method (_DIS, 0, NotSerialized) { Store (Zero, PIRC) } aml://_SB_.LNKC._CRS aml://_SB_.LNKC --=[ _SB.LNKC._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQC, IRA0) Return (ICRS) } aml://_SB_.LNKC._SRS aml://_SB_.LNKC --=[ _SB.LNKC._SRS ]=-- Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRC) Store (PIRC, IRQC) } aml://_SB_.LNKC aml://_SB_ --=[ _SB.LNKC ]=-- Device (LNKC) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x03) Method (_STA, 0, NotSerialized) { Store (PIRC, IRQC) If (PIRC) { Return (0x0B) } Else { Return (0x09) } } Method (_PRS, 0, NotSerialized) { Return (PRSC) } Method (_DIS, 0, NotSerialized) { Store (Zero, PIRC) } Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQC, IRA0) Return (ICRS) } Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRC) Store (PIRC, IRQC) } } aml://_SB_.LNKD._STA aml://_SB_.LNKD --=[ _SB.LNKD._STA ]=-- Method (_STA, 0, NotSerialized) { Store (PIRD, IRQD) If (PIRD) { Return (0x0B) } Else { Return (0x09) } } aml://_SB_.LNKD._PRS aml://_SB_.LNKD --=[ _SB.LNKD._PRS ]=-- Method (_PRS, 0, NotSerialized) { Return (PRSD) } aml://_SB_.LNKD._DIS aml://_SB_.LNKD --=[ _SB.LNKD._DIS ]=-- Method (_DIS, 0, NotSerialized) { Store (Zero, PIRD) } aml://_SB_.LNKD._CRS aml://_SB_.LNKD --=[ _SB.LNKD._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQD, IRA0) Return (ICRS) } aml://_SB_.LNKD._SRS aml://_SB_.LNKD --=[ _SB.LNKD._SRS ]=-- Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRD) Store (PIRD, IRQD) } aml://_SB_.LNKD aml://_SB_ --=[ _SB.LNKD ]=-- Device (LNKD) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x04) Method (_STA, 0, NotSerialized) { Store (PIRD, IRQD) If (PIRD) { Return (0x0B) } Else { Return (0x09) } } Method (_PRS, 0, NotSerialized) { Return (PRSD) } Method (_DIS, 0, NotSerialized) { Store (Zero, PIRD) } Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQD, IRA0) Return (ICRS) } Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRD) Store (PIRD, IRQD) } } aml://_SB_.LNKE._STA aml://_SB_.LNKE --=[ _SB.LNKE._STA ]=-- Method (_STA, 0, NotSerialized) { Store (PIRE, IRQE) If (PIRE) { Return (0x0B) } Else { Return (0x09) } } aml://_SB_.LNKE._PRS aml://_SB_.LNKE --=[ _SB.LNKE._PRS ]=-- Method (_PRS, 0, NotSerialized) { Return (PRSE) } aml://_SB_.LNKE._DIS aml://_SB_.LNKE --=[ _SB.LNKE._DIS ]=-- Method (_DIS, 0, NotSerialized) { Store (Zero, PIRE) } aml://_SB_.LNKE._CRS aml://_SB_.LNKE --=[ _SB.LNKE._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQE, IRA0) Return (ICRS) } aml://_SB_.LNKE._SRS aml://_SB_.LNKE --=[ _SB.LNKE._SRS ]=-- Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRE) Store (PIRE, IRQE) Store (One, ENR8) Store (Zero, POLE) } aml://_SB_.LNKE aml://_SB_ --=[ _SB.LNKE ]=-- Device (LNKE) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, One) Method (_STA, 0, NotSerialized) { Store (PIRE, IRQE) If (PIRE) { Return (0x0B) } Else { Return (0x09) } } Method (_PRS, 0, NotSerialized) { Return (PRSE) } Method (_DIS, 0, NotSerialized) { Store (Zero, PIRE) } Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQE, IRA0) Return (ICRS) } Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRE) Store (PIRE, IRQE) Store (One, ENR8) Store (Zero, POLE) } } aml://_SB_.LNKF._STA aml://_SB_.LNKF --=[ _SB.LNKF._STA ]=-- Method (_STA, 0, NotSerialized) { Store (PIRF, IRQF) If (PIRF) { Return (0x0B) } Else { Return (0x09) } } aml://_SB_.LNKF._PRS aml://_SB_.LNKF --=[ _SB.LNKF._PRS ]=-- Method (_PRS, 0, NotSerialized) { Return (PRSF) } aml://_SB_.LNKF._DIS aml://_SB_.LNKF --=[ _SB.LNKF._DIS ]=-- Method (_DIS, 0, NotSerialized) { Store (Zero, PIRF) } aml://_SB_.LNKF._CRS aml://_SB_.LNKF --=[ _SB.LNKF._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQF, IRA0) Return (ICRS) } aml://_SB_.LNKF._SRS aml://_SB_.LNKF --=[ _SB.LNKF._SRS ]=-- Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRF) Store (PIRF, IRQF) Store (One, ENR8) Store (Zero, POLF) } aml://_SB_.LNKF aml://_SB_ --=[ _SB.LNKF ]=-- Device (LNKF) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x02) Method (_STA, 0, NotSerialized) { Store (PIRF, IRQF) If (PIRF) { Return (0x0B) } Else { Return (0x09) } } Method (_PRS, 0, NotSerialized) { Return (PRSF) } Method (_DIS, 0, NotSerialized) { Store (Zero, PIRF) } Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQF, IRA0) Return (ICRS) } Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRF) Store (PIRF, IRQF) Store (One, ENR8) Store (Zero, POLF) } } aml://_SB_.LNKG._STA aml://_SB_.LNKG --=[ _SB.LNKG._STA ]=-- Method (_STA, 0, NotSerialized) { Store (PIRG, IRQG) If (PIRG) { Return (0x0B) } Else { Return (0x09) } } aml://_SB_.LNKG._PRS aml://_SB_.LNKG --=[ _SB.LNKG._PRS ]=-- Method (_PRS, 0, NotSerialized) { Return (PRSG) } aml://_SB_.LNKG._DIS aml://_SB_.LNKG --=[ _SB.LNKG._DIS ]=-- Method (_DIS, 0, NotSerialized) { Store (Zero, PIRG) } aml://_SB_.LNKG._CRS aml://_SB_.LNKG --=[ _SB.LNKG._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQG, IRA0) Return (ICRS) } aml://_SB_.LNKG._SRS aml://_SB_.LNKG --=[ _SB.LNKG._SRS ]=-- Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRG) Store (PIRG, IRQG) Store (One, ENR8) Store (Zero, POLG) } aml://_SB_.LNKG aml://_SB_ --=[ _SB.LNKG ]=-- Device (LNKG) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x03) Method (_STA, 0, NotSerialized) { Store (PIRG, IRQG) If (PIRG) { Return (0x0B) } Else { Return (0x09) } } Method (_PRS, 0, NotSerialized) { Return (PRSG) } Method (_DIS, 0, NotSerialized) { Store (Zero, PIRG) } Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQG, IRA0) Return (ICRS) } Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRG) Store (PIRG, IRQG) Store (One, ENR8) Store (Zero, POLG) } } aml://_SB_.LNKH._STA aml://_SB_.LNKH --=[ _SB.LNKH._STA ]=-- Method (_STA, 0, NotSerialized) { Store (PIRH, IRQH) If (PIRH) { Return (0x0B) } Else { Return (0x09) } } aml://_SB_.LNKH._PRS aml://_SB_.LNKH --=[ _SB.LNKH._PRS ]=-- Method (_PRS, 0, NotSerialized) { Return (PRSH) } aml://_SB_.LNKH._DIS aml://_SB_.LNKH --=[ _SB.LNKH._DIS ]=-- Method (_DIS, 0, NotSerialized) { Store (Zero, PIRH) If (LEqual (PIHH, One)) { Store (Zero, POLH) } } aml://_SB_.LNKH._CRS aml://_SB_.LNKH --=[ _SB.LNKH._CRS ]=-- Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQH, IRA0) Return (ICRS) } aml://_SB_.LNKH._SRS aml://_SB_.LNKH --=[ _SB.LNKH._SRS ]=-- Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRH) Store (PIRH, IRQH) Store (One, ENR8) If (LEqual (PIHH, One)) { Store (One, POLH) } Else { Store (Zero, POLH) } } aml://_SB_.LNKH aml://_SB_ --=[ _SB.LNKH ]=-- Device (LNKH) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x04) Method (_STA, 0, NotSerialized) { Store (PIRH, IRQH) If (PIRH) { Return (0x0B) } Else { Return (0x09) } } Method (_PRS, 0, NotSerialized) { Return (PRSH) } Method (_DIS, 0, NotSerialized) { Store (Zero, PIRH) If (LEqual (PIHH, One)) { Store (Zero, POLH) } } Method (_CRS, 0, NotSerialized) { CreateWordField (ICRS, One, IRA0) Store (One, Local1) ShiftLeft (Local1, IRQH, IRA0) Return (ICRS) } Method (_SRS, 1, NotSerialized) { CreateWordField (Arg0, One, IRA) FindSetRightBit (IRA, Local0) Decrement (Local0) Store (Local0, PIRH) Store (PIRH, IRQH) Store (One, ENR8) If (LEqual (PIHH, One)) { Store (One, POLH) } Else { Store (Zero, POLH) } } } aml://_SB --=[ _SB ]=-- aml://_SB_.RBPE aml://_SB_ --=[ _SB.RBPE ]=-- Method (RBPE, 1, NotSerialized) { Acquire (MUTE, 0x03E8) Add (Arg0, PCIB, Local0) OperationRegion (PCFG, SystemMemory, Local0, One) Field (PCFG, ByteAcc, NoLock, Preserve) { XCFG, 8 } Release (MUTE) Return (XCFG) } aml://_SB_.RWPE aml://_SB_ --=[ _SB.RWPE ]=-- Method (RWPE, 1, NotSerialized) { Acquire (MUTE, 0x03E8) And (Arg0, 0xFFFFFFFE, Arg0) Add (Arg0, PCIB, Local0) OperationRegion (PCFG, SystemMemory, Local0, 0x02) Field (PCFG, WordAcc, NoLock, Preserve) { XCFG, 16 } Release (MUTE) Return (XCFG) } aml://_SB_.RDPE aml://_SB_ --=[ _SB.RDPE ]=-- Method (RDPE, 1, NotSerialized) { Acquire (MUTE, 0x03E8) And (Arg0, 0xFFFFFFFC, Arg0) Add (Arg0, PCIB, Local0) OperationRegion (PCFG, SystemMemory, Local0, 0x04) Field (PCFG, DWordAcc, NoLock, Preserve) { XCFG, 32 } Release (MUTE) Return (XCFG) } aml://_SB_.WBPE aml://_SB_ --=[ _SB.WBPE ]=-- Method (WBPE, 2, NotSerialized) { Acquire (MUTE, 0x0FFF) Add (Arg0, PCIB, Local0) OperationRegion (PCFG, SystemMemory, Local0, One) Field (PCFG, ByteAcc, NoLock, Preserve) { XCFG, 8 } Store (Arg1, XCFG) Release (MUTE) } aml://_SB_.WWPE aml://_SB_ --=[ _SB.WWPE ]=-- Method (WWPE, 2, NotSerialized) { Acquire (MUTE, 0x03E8) And (Arg0, 0xFFFFFFFE, Arg0) Add (Arg0, PCIB, Local0) OperationRegion (PCFG, SystemMemory, Local0, 0x02) Field (PCFG, WordAcc, NoLock, Preserve) { XCFG, 16 } Store (Arg1, XCFG) Release (MUTE) } aml://_SB_.WDPE aml://_SB_ --=[ _SB.WDPE ]=-- Method (WDPE, 2, NotSerialized) { Acquire (MUTE, 0x03E8) And (Arg0, 0xFFFFFFFC, Arg0) Add (Arg0, PCIB, Local0) OperationRegion (PCFG, SystemMemory, Local0, 0x04) Field (PCFG, DWordAcc, NoLock, Preserve) { XCFG, 32 } Store (Arg1, XCFG) Release (MUTE) } aml://_SB_.RWDP aml://_SB_ --=[ _SB.RWDP ]=-- Method (RWDP, 3, NotSerialized) { Acquire (MUTE, 0x03E8) And (Arg0, 0xFFFFFFFC, Arg0) Add (Arg0, PCIB, Local0) OperationRegion (PCFG, SystemMemory, Local0, 0x04) Field (PCFG, DWordAcc, NoLock, Preserve) { XCFG, 32 } And (XCFG, Arg2, Local1) Or (Local1, Arg1, XCFG) Release (MUTE) } aml://_SB_.RPME aml://_SB_ --=[ _SB.RPME ]=-- Method (RPME, 1, NotSerialized) { Add (Arg0, 0x84, Local0) Store (RDPE (Local0), Local1) If (LEqual (Local1, Ones)) { Return (Zero) } Else { If (LAnd (Local1, 0x00010000)) { WDPE (Local0, And (Local1, 0x00010000)) Return (One) } Return (Zero) } } aml://_SB --=[ _SB ]=-- aml://FZHD --=[ FZHD ]=-- Method (FZHD, 0, NotSerialized) { Store (0x80, Local0) Store (DMAX, Local1) While (LLessEqual (Local0, Local1)) { And (Local0, 0x7F, Local3) Store (One, Local2) ShiftLeft (Local2, Local3, Local2) If (LNot (And (\_SB.PCI0.HFZF, Local2))) { If (FZOD (Local0)) { Or (\_SB.PCI0.HFZF, Local2, \_SB.PCI0.HFZF) } } Increment (Local0) } } aml://FZOD --=[ FZOD ]=-- Method (FZOD, 1, NotSerialized) { GHET (Arg0) If (LEqual (HBAS, Zero)) { Return (One) } If (LEqual (HDEV, Zero)) { Return (One) } Store (HDEV, Local1) And (Local1, 0x10, Local1) If (LEqual (Local1, Zero)) { Return (One) } WFCF () SDRV () Add (HBAS, 0x07, Local1) OperationRegion (HRGS, SystemIO, Local1, One) Field (HRGS, ByteAcc, NoLock, Preserve) { SREG, 8 } Store (SREG, Local1) And (Local1, 0x80, Local1) If (Local1) { Return (Zero) } Add (HBAS, 0x07, Local1) OperationRegion (HRGC, SystemIO, Local1, One) Field (HRGC, ByteAcc, NoLock, Preserve) { CREG, 8 } Store (0xF5, CREG) If (WFCF ()) { Add (HBAS, 0x07, Local0) Store (SREG, Local1) Return (LNot (And (Local1, One))) } Else { Return (Zero) } } aml://GHET --=[ GHET ]=-- Method (GHET, 1, NotSerialized) { And (Arg0, 0x7F, Local0) ShiftLeft (Local0, 0x05, Local0) Add (Local0, HPTA, Local0) OperationRegion (HDPT, SystemMemory, Local0, 0x20) Field (HDPT, ByteAcc, NoLock, Preserve) { HP00, 16, Offset (0x04), HP04, 8, Offset (0x12), HP0C, 8 } Store (HP00, HBAS) Store (HP04, HLBA) Store (HP0C, HDEV) } aml://SDRV --=[ SDRV ]=-- Method (SDRV, 0, NotSerialized) { Add (HBAS, 0x06, Local0) OperationRegion (HRGH, SystemIO, Local0, One) Field (HRGH, ByteAcc, NoLock, Preserve) { HREG, 8 } Store (HLBA, HREG) } aml://WFCF --=[ WFCF ]=-- Method (WFCF, 0, NotSerialized) { SDRV () Add (HBAS, One, Local0) OperationRegion (HRGE, SystemIO, Local0, One) Field (HRGE, ByteAcc, NoLock, Preserve) { EREG, 8 } Store (Zero, EREG) Add (HBAS, 0x07, Local1) OperationRegion (HRGC, SystemIO, Local1, One) Field (HRGC, ByteAcc, NoLock, Preserve) { CREG, 8 } Store (0x28, Local0) While (Local0) { And (CREG, One, Local2) If (Local2) { Return (Zero) } WFZF (Local1) And (CREG, 0x80, Local2) If (LEqual (Local2, Zero)) { Return (One) } Decrement (Local0) } Return (Zero) } aml://WFZF --=[ WFZF ]=-- Method (WFZF, 1, NotSerialized) { OperationRegion (HRGC, SystemIO, Arg0, One) Field (HRGC, ByteAcc, NoLock, Preserve) { CREG, 8 } Store (0xFFFF, Local1) Store (CREG, Local2) And (Local2, 0x80, Local2) If (LEqual (Local2, Zero)) { Return (Zero) } While (Local1) { Stall (0x0F) Decrement (Local1) If (LEqual (Local1, Zero)) { Return (Zero) } Store (CREG, Local2) And (Local2, 0x80, Local2) If (LEqual (Local2, Zero)) { Return (Zero) } Decrement (Local1) } } aml://_SB_.PCI0.HWAK aml://_SB_.PCI0 --=[ _SB.PCI0.HWAK ]=-- Method (HWAK, 1, NotSerialized) { If (LEqual (Arg0, 0x03)) { Store (Zero, HFZF) } } aml://_SB_.PCI0 aml://_SB_ --=[ _SB.PCI0 ]=-- Scope (_SB.PCI0) { Name (HFZF, 0xFFFF) Method (HWAK, 1, NotSerialized) { If (LEqual (Arg0, 0x03)) { Store (Zero, HFZF) } } } aml://_SB_.PCI0.SBRG.SIOR.HWV0 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWV0 ]=-- Method (HWV0, 0, NotSerialized) { Return (Multiply (VIV0, 0x10)) } aml://_SB_.PCI0.SBRG.SIOR.HWV1 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWV1 ]=-- Method (HWV1, 0, NotSerialized) { Return (Multiply (VIV1, 0x10)) } aml://_SB_.PCI0.SBRG.SIOR.HWV2 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWV2 ]=-- Method (HWV2, 0, NotSerialized) { Return (Multiply (VIV2, 0x10)) } aml://_SB_.PCI0.SBRG.SIOR.HWV3 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWV3 ]=-- Method (HWV3, 0, NotSerialized) { Return (Multiply (VIV3, 0x10)) } aml://_SB_.PCI0.SBRG.SIOR.HWV4 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWV4 ]=-- Method (HWV4, 0, NotSerialized) { Add (VIV4, 0x0C, VIV4) Return (Multiply (VIV4, 0x10)) } aml://_SB_.PCI0.SBRG.SIOR.HWV5 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWV5 ]=-- Method (HWV5, 0, NotSerialized) { Return (Multiply (VIV5, 0x10)) } aml://_SB_.PCI0.SBRG.SIOR.HWV6 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWV6 ]=-- Method (HWV6, 0, NotSerialized) { Return (Multiply (VIV6, 0x10)) } aml://_SB_.PCI0.SBRG.SIOR.HWV7 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWV7 ]=-- Method (HWV7, 0, NotSerialized) { Return (Multiply (VIV7, 0x10)) } aml://_SB_.PCI0.SBRG.SIOR.HWT1 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWT1 ]=-- Method (HWT1, 0, NotSerialized) { Store (TPI1, Local0) If (LGreater (Local0, 0x80)) { Subtract (0x0100, Local0, Local0) } Return (Multiply (Local0, 0x0A)) } aml://_SB_.PCI0.SBRG.SIOR.HWT2 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWT2 ]=-- Method (HWT2, 0, NotSerialized) { Store (TPI2, Local0) If (LGreater (Local0, 0x80)) { Subtract (0x0100, Local0, Local0) } Subtract (Local0, 0x05, Local0) Return (Multiply (Local0, 0x0A)) } aml://_SB_.PCI0.SBRG.SIOR.HWT3 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWT3 ]=-- Method (HWT3, 0, NotSerialized) { Store (TPI3, Local0) If (LGreater (Local0, 0x80)) { Subtract (0x0100, Local0, Local0) } Return (Multiply (Local0, 0x0A)) } aml://_SB_.PCI0.SBRG.SIOR.HWF1 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWF1 ]=-- Method (HWF1, 0, NotSerialized) { Store (FTC1, Local0) Store (One, Local2) While (LAnd (LOr (LLessEqual (Local0, FHMT), LGreaterEqual (Local0, FLMT)), LEqual (Local2, One))) { If (LLessEqual (Local0, FHMT)) { Store (FTD1, Local1) If (LGreater (Local1, Zero)) { Decrement (Local1) Store (Local1, FTD1) } Else { Store (Zero, Local2) } } Else { Store (FTD1, Local1) If (LLess (Local1, 0x07)) { Increment (Local1) Store (Local1, FTD1) } Else { Store (Zero, Local2) } } Sleep (0x012C) Store (FTC1, Local0) } If (LOr (LEqual (Local0, Zero), LEqual (Local0, 0xFF))) { Return (Zero) } Else { Divide (FTFR, Multiply (Local0, DerefOf (Index (DTB1, FTD1))), , Local1) Return (Local1) } } aml://_SB_.PCI0.SBRG.SIOR.HWF2 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWF2 ]=-- Method (HWF2, 0, NotSerialized) { Store (FTC2, Local0) Store (One, Local2) While (LAnd (LOr (LLessEqual (Local0, FHMT), LGreaterEqual (Local0, FLMT)), LEqual (Local2, One))) { If (LLessEqual (Local0, FHMT)) { Store (FTD2, Local1) If (LGreater (Local1, Zero)) { Decrement (Local1) Store (Local1, FTD2) } Else { Store (Zero, Local2) } } Else { Store (FTD2, Local1) If (LLess (Local1, 0x07)) { Increment (Local1) Store (Local1, FTD2) } Else { Store (Zero, Local2) } } Sleep (0x012C) Store (FTC2, Local0) } If (LOr (LEqual (Local0, Zero), LEqual (Local0, 0xFF))) { Return (Zero) } Else { Divide (FTFR, Multiply (Local0, DerefOf (Index (DTB1, FTD2))), , Local1) Return (Local1) } } aml://_SB_.PCI0.SBRG.SIOR.HWF3 aml://_SB_.PCI0.SBRG.SIOR --=[ _SB.PCI0.SBRG.SIOR.HWF3 ]=-- Method (HWF3, 0, NotSerialized) { Store (FTC3, Local0) If (LLessEqual (Local0, FHMT)) { Store (FTD3, Local1) If (LGreater (Local1, Zero)) { Decrement (Local1) Store (Local1, FTD3) Sleep (0x012C) Store (FTC3, Local0) } } Else { If (LGreaterEqual (Local0, FLMT)) { Store (FTD3, Local1) If (LLess (Local1, One)) { Increment (Local1) Store (Local1, FTD3) Sleep (0x012C) Store (FTC3, Local0) } } } If (LOr (LEqual (Local0, Zero), LEqual (Local0, 0xFF))) { Return (Zero) } Else { Divide (FTFR, Multiply (Local0, DerefOf (Index (DTB2, FTD3))), , Local1) Return (Local1) } } aml://_SB_.PCI0.SBRG.SIOR aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.SIOR ]=-- Scope (_SB.PCI0.SBRG.SIOR) { Method (HWV0, 0, NotSerialized) { Return (Multiply (VIV0, 0x10)) } Method (HWV1, 0, NotSerialized) { Return (Multiply (VIV1, 0x10)) } Method (HWV2, 0, NotSerialized) { Return (Multiply (VIV2, 0x10)) } Method (HWV3, 0, NotSerialized) { Return (Multiply (VIV3, 0x10)) } Method (HWV4, 0, NotSerialized) { Add (VIV4, 0x0C, VIV4) Return (Multiply (VIV4, 0x10)) } Method (HWV5, 0, NotSerialized) { Return (Multiply (VIV5, 0x10)) } Method (HWV6, 0, NotSerialized) { Return (Multiply (VIV6, 0x10)) } Method (HWV7, 0, NotSerialized) { Return (Multiply (VIV7, 0x10)) } Method (HWT1, 0, NotSerialized) { Store (TPI1, Local0) If (LGreater (Local0, 0x80)) { Subtract (0x0100, Local0, Local0) } Return (Multiply (Local0, 0x0A)) } Method (HWT2, 0, NotSerialized) { Store (TPI2, Local0) If (LGreater (Local0, 0x80)) { Subtract (0x0100, Local0, Local0) } Subtract (Local0, 0x05, Local0) Return (Multiply (Local0, 0x0A)) } Method (HWT3, 0, NotSerialized) { Store (TPI3, Local0) If (LGreater (Local0, 0x80)) { Subtract (0x0100, Local0, Local0) } Return (Multiply (Local0, 0x0A)) } Method (HWF1, 0, NotSerialized) { Store (FTC1, Local0) Store (One, Local2) While (LAnd (LOr (LLessEqual (Local0, FHMT), LGreaterEqual (Local0, FLMT)), LEqual (Local2, One))) { If (LLessEqual (Local0, FHMT)) { Store (FTD1, Local1) If (LGreater (Local1, Zero)) { Decrement (Local1) Store (Local1, FTD1) } Else { Store (Zero, Local2) } } Else { Store (FTD1, Local1) If (LLess (Local1, 0x07)) { Increment (Local1) Store (Local1, FTD1) } Else { Store (Zero, Local2) } } Sleep (0x012C) Store (FTC1, Local0) } If (LOr (LEqual (Local0, Zero), LEqual (Local0, 0xFF))) { Return (Zero) } Else { Divide (FTFR, Multiply (Local0, DerefOf (Index (DTB1, FTD1))), , Local1) Return (Local1) } } Method (HWF2, 0, NotSerialized) { Store (FTC2, Local0) Store (One, Local2) While (LAnd (LOr (LLessEqual (Local0, FHMT), LGreaterEqual (Local0, FLMT)), LEqual (Local2, One))) { If (LLessEqual (Local0, FHMT)) { Store (FTD2, Local1) If (LGreater (Local1, Zero)) { Decrement (Local1) Store (Local1, FTD2) } Else { Store (Zero, Local2) } } Else { Store (FTD2, Local1) If (LLess (Local1, 0x07)) { Increment (Local1) Store (Local1, FTD2) } Else { Store (Zero, Local2) } } Sleep (0x012C) Store (FTC2, Local0) } If (LOr (LEqual (Local0, Zero), LEqual (Local0, 0xFF))) { Return (Zero) } Else { Divide (FTFR, Multiply (Local0, DerefOf (Index (DTB1, FTD2))), , Local1) Return (Local1) } } Method (HWF3, 0, NotSerialized) { Store (FTC3, Local0) If (LLessEqual (Local0, FHMT)) { Store (FTD3, Local1) If (LGreater (Local1, Zero)) { Decrement (Local1) Store (Local1, FTD3) Sleep (0x012C) Store (FTC3, Local0) } } Else { If (LGreaterEqual (Local0, FLMT)) { Store (FTD3, Local1) If (LLess (Local1, One)) { Increment (Local1) Store (Local1, FTD3) Sleep (0x012C) Store (FTC3, Local0) } } } If (LOr (LEqual (Local0, Zero), LEqual (Local0, 0xFF))) { Return (Zero) } Else { Divide (FTFR, Multiply (Local0, DerefOf (Index (DTB2, FTD3))), , Local1) Return (Local1) } } Name (FTFR, 0x00149970) Name (FHMT, 0x78) Name (FLMT, 0xFE) Name (DTB1, Package (0x08) { One, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 }) Name (DTB2, Package (0x02) { 0x02, 0x08 }) OperationRegion (ECRE, SystemIO, IOEB, 0x20) Field (ECRE, ByteAcc, NoLock, Preserve) { Offset (0x05), HIDX, 8, HDAT, 8 } IndexField (HIDX, HDAT, ByteAcc, NoLock, Preserve) { Offset (0x0B), FTD1, 3, FTD2, 3, FTD3, 1, Offset (0x0C), ETDE, 8, FTC1, 8, FTC2, 8, FTC3, 8, Offset (0x18), EFN1, 8, EFN2, 8, EFN3, 8, Offset (0x20), VIV0, 8, VIV1, 8, VIV2, 8, VIV3, 8, VIV4, 8, VIV5, 8, VIV6, 8, VIV7, 8, Offset (0x29), TPI1, 8, TPI2, 8, TPI3, 8 } } aml://_SB_.PCI0.SBRG.ASOC.VGET aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.VGET ]=-- Method (VGET, 1, NotSerialized) { If (LEqual (Arg0, Zero)) { Return (^^SIOR.HWV0 ()) } If (LEqual (Arg0, One)) { Return (^^SIOR.HWV2 ()) } If (LEqual (Arg0, 0x02)) { Return (^^SIOR.HWV3 ()) } If (LEqual (Arg0, 0x03)) { Return (^^SIOR.HWV4 ()) } } aml://_SB_.PCI0.SBRG.ASOC.TGET aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.TGET ]=-- Method (TGET, 1, NotSerialized) { If (LEqual (Arg0, Zero)) { Return (^^SIOR.HWT1 ()) } If (LEqual (Arg0, One)) { Return (^^SIOR.HWT2 ()) } } aml://_SB_.PCI0.SBRG.ASOC.FGET aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.FGET ]=-- Method (FGET, 1, NotSerialized) { If (LEqual (Arg0, Zero)) { Return (^^SIOR.HWF1 ()) } If (LEqual (Arg0, One)) { Return (^^SIOR.HWF2 ()) } If (LEqual (Arg0, 0x02)) { Return (^^SIOR.HWF3 ()) } } aml://_SB_.PCI0.SBRG.ASOC.VSIF aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.VSIF ]=-- Method (VSIF, 0, NotSerialized) { Return (VBUF) } aml://_SB_.PCI0.SBRG.ASOC.RVLT aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.RVLT ]=-- Method (RVLT, 1, NotSerialized) { And (Arg0, 0xFFFF, Local0) Store (VGET (Local0), Local1) Store (DerefOf (Index (DerefOf (Index (VPAR, Local0)), Zero)), Local2) Store (DerefOf (Index (DerefOf (Index (VPAR, Local0)), One)), Local3) Store (DerefOf (Index (DerefOf (Index (VPAR, Local0)), 0x02)), Local4) Multiply (Local1, Add (Local2, Local3), Local5) Divide (Local5, Local3, , Local5) Add (Local5, Local4, Local5) Return (Local5) } aml://_SB_.PCI0.SBRG.ASOC.SVLT aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.SVLT ]=-- Method (SVLT, 1, NotSerialized) { And (DerefOf (Index (Arg0, Zero)), 0xFFFF, Local0) Store (DerefOf (Index (VBUF, Zero)), Local1) If (LGreaterEqual (Local0, Local1)) { Return (Zero) } Increment (Local0) Store (DerefOf (Index (Arg0, One)), Index (DerefOf (Index (VBUF, Local0)), One)) Store (DerefOf (Index (Arg0, 0x02)), Index (DerefOf (Index (VBUF, Local0)), 0x02)) Store (DerefOf (Index (Arg0, 0x03)), Index (DerefOf (Index (VBUF, Local0)), 0x03)) Store (DerefOf (Index (Arg0, 0x04)), Index (DerefOf (Index (VBUF, Local0)), 0x04)) Return (One) } aml://_SB_.PCI0.SBRG.ASOC.TSIF aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.TSIF ]=-- Method (TSIF, 0, NotSerialized) { Return (TBUF) } aml://_SB_.PCI0.SBRG.ASOC.RTMP aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.RTMP ]=-- Method (RTMP, 1, NotSerialized) { And (Arg0, 0xFFFF, Local0) Store (TGET (Local0), Local1) Return (Local1) } aml://_SB_.PCI0.SBRG.ASOC.STMP aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.STMP ]=-- Method (STMP, 1, NotSerialized) { Store (And (DerefOf (Index (Arg0, Zero)), 0xFFFF), Local0) Store (DerefOf (Index (TBUF, Zero)), Local1) If (LGreaterEqual (Local0, Local1)) { Return (Zero) } Increment (Local0) Store (DerefOf (Index (Arg0, One)), Index (DerefOf (Index (TBUF, Local0)), One)) Store (DerefOf (Index (Arg0, 0x02)), Index (DerefOf (Index (TBUF, Local0)), 0x02)) Store (DerefOf (Index (Arg0, 0x03)), Index (DerefOf (Index (TBUF, Local0)), 0x03)) Store (DerefOf (Index (Arg0, 0x04)), Index (DerefOf (Index (TBUF, Local0)), 0x04)) Return (One) } aml://_SB_.PCI0.SBRG.ASOC.FSIF aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.FSIF ]=-- Method (FSIF, 0, NotSerialized) { Return (FBUF) } aml://_SB_.PCI0.SBRG.ASOC.RFAN aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.RFAN ]=-- Method (RFAN, 1, NotSerialized) { And (Arg0, 0xFFFF, Local0) Store (FGET (Local0), Local1) Return (Local1) } aml://_SB_.PCI0.SBRG.ASOC.SFAN aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.SFAN ]=-- Method (SFAN, 1, NotSerialized) { And (DerefOf (Index (Arg0, Zero)), 0xFFFF, Local0) Store (DerefOf (Index (FBUF, Zero)), Local1) If (LGreaterEqual (Local0, Local1)) { Return (Zero) } Increment (Local0) Store (DerefOf (Index (Arg0, One)), Index (DerefOf (Index (FBUF, Local0)), One)) Store (DerefOf (Index (Arg0, 0x02)), Index (DerefOf (Index (FBUF, Local0)), 0x02)) Store (DerefOf (Index (Arg0, 0x03)), Index (DerefOf (Index (FBUF, Local0)), 0x03)) Store (DerefOf (Index (Arg0, 0x04)), Index (DerefOf (Index (FBUF, Local0)), 0x04)) Return (One) } aml://_SB_.PCI0.SBRG.ASOC.QFIF aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.QFIF ]=-- Method (QFIF, 0, NotSerialized) { If (LEqual (CPUQ, Zero)) { And (DerefOf (Index (QCFN, 0x05)), 0xFFFDFFFF, Local0) Store (Local0, Index (QCFN, 0x05)) } Else { Or (DerefOf (Index (QCFN, 0x05)), 0x00020000, Local0) Store (Local0, Index (QCFN, 0x05)) } Return (QBUF) } aml://_SB_.PCI0.SBRG.ASOC.GCQV aml://_SB_.PCI0.SBRG.ASOC --=[ _SB.PCI0.SBRG.ASOC.GCQV ]=-- Method (GCQV, 1, NotSerialized) { If (LEqual (Arg0, Zero)) { Return (CPVL) } If (LEqual (Arg0, One)) { Return (CPVH) } If (LEqual (Arg0, 0x02)) { Return (CPVC) } Return (Zero) } aml://_SB_.PCI0.SBRG.ASOC aml://_SB_.PCI0.SBRG --=[ _SB.PCI0.SBRG.ASOC ]=-- Scope (_SB.PCI0.SBRG.ASOC) { Name (CORV, Package (0x05) { 0x06020000, "Vcore Voltage", 0x0352, 0x0640, One }) Name (V3VV, Package (0x05) { 0x06020001, " +3.3 Voltage", 0x0B9A, 0x0E2E, One }) Name (V5VV, Package (0x05) { 0x06020002, " +5 Voltage", 0x1194, 0x157C, One }) Name (VV12, Package (0x05) { 0x06020003, " +12 Voltage", 0x27D8, 0x35E8, One }) Name (VPAR, Package (0x04) { Package (0x03) { Zero, One, Zero }, Package (0x03) { Zero, One, Zero }, Package (0x03) { 0x22, 0x32, Zero }, Package (0x03) { 0x1C, 0x0A, Zero } }) Name (VBUF, Package (0x05) { 0x04, CORV, V3VV, V5VV, VV12 }) Method (VGET, 1, NotSerialized) { If (LEqual (Arg0, Zero)) { Return (^^SIOR.HWV0 ()) } If (LEqual (Arg0, One)) { Return (^^SIOR.HWV2 ()) } If (LEqual (Arg0, 0x02)) { Return (^^SIOR.HWV3 ()) } If (LEqual (Arg0, 0x03)) { Return (^^SIOR.HWV4 ()) } } Name (CPUT, Package (0x05) { 0x06030000, "CPU Temperature", 0x0258, 0x03B6, 0x00010001 }) Name (MBTP, Package (0x05) { 0x06030001, "MB Temperature", 0x01C2, 0x03B6, 0x00010001 }) Name (TBUF, Package (0x03) { 0x02, CPUT, MBTP }) Method (TGET, 1, NotSerialized) { If (LEqual (Arg0, Zero)) { Return (^^SIOR.HWT1 ()) } If (LEqual (Arg0, One)) { Return (^^SIOR.HWT2 ()) } } Name (CPUF, Package (0x05) { 0x06040000, "CPU FAN Speed", 0x0320, 0x1C20, 0x00010001 }) Name (CHAF, Package (0x05) { 0x06040001, "CHASSIS FAN Speed", 0x0320, 0x1C20, 0x00010001 }) Name (PWRF, Package (0x05) { 0x06040002, "CHASSIS2 FAN Speed", 0x0320, 0x1C20, 0x00010001 }) Name (FBUF, Package (0x04) { 0x03, CPUF, CHAF, PWRF }) Method (FGET, 1, NotSerialized) { If (LEqual (Arg0, Zero)) { Return (^^SIOR.HWF1 ()) } If (LEqual (Arg0, One)) { Return (^^SIOR.HWF2 ()) } If (LEqual (Arg0, 0x02)) { Return (^^SIOR.HWF3 ()) } } Name (QCFN, Package (0x06) { 0x04060003, "CPU Q-Fan Control", Zero, One, 0x02, 0x00010000 }) Name (QBUF, Package (0x02) { One, QCFN }) Method (VSIF, 0, NotSerialized) { Return (VBUF) } Method (RVLT, 1, NotSerialized) { And (Arg0, 0xFFFF, Local0) Store (VGET (Local0), Local1) Store (DerefOf (Index (DerefOf (Index (VPAR, Local0)), Zero)), Local2) Store (DerefOf (Index (DerefOf (Index (VPAR, Local0)), One)), Local3) Store (DerefOf (Index (DerefOf (Index (VPAR, Local0)), 0x02)), Local4) Multiply (Local1, Add (Local2, Local3), Local5) Divide (Local5, Local3, , Local5) Add (Local5, Local4, Local5) Return (Local5) } Method (SVLT, 1, NotSerialized) { And (DerefOf (Index (Arg0, Zero)), 0xFFFF, Local0) Store (DerefOf (Index (VBUF, Zero)), Local1) If (LGreaterEqual (Local0, Local1)) { Return (Zero) } Increment (Local0) Store (DerefOf (Index (Arg0, One)), Index (DerefOf (Index (VBUF, Local0)), One)) Store (DerefOf (Index (Arg0, 0x02)), Index (DerefOf (Index (VBUF, Local0)), 0x02)) Store (DerefOf (Index (Arg0, 0x03)), Index (DerefOf (Index (VBUF, Local0)), 0x03)) Store (DerefOf (Index (Arg0, 0x04)), Index (DerefOf (Index (VBUF, Local0)), 0x04)) Return (One) } Method (TSIF, 0, NotSerialized) { Return (TBUF) } Method (RTMP, 1, NotSerialized) { And (Arg0, 0xFFFF, Local0) Store (TGET (Local0), Local1) Return (Local1) } Method (STMP, 1, NotSerialized) { Store (And (DerefOf (Index (Arg0, Zero)), 0xFFFF), Local0) Store (DerefOf (Index (TBUF, Zero)), Local1) If (LGreaterEqual (Local0, Local1)) { Return (Zero) } Increment (Local0) Store (DerefOf (Index (Arg0, One)), Index (DerefOf (Index (TBUF, Local0)), One)) Store (DerefOf (Index (Arg0, 0x02)), Index (DerefOf (Index (TBUF, Local0)), 0x02)) Store (DerefOf (Index (Arg0, 0x03)), Index (DerefOf (Index (TBUF, Local0)), 0x03)) Store (DerefOf (Index (Arg0, 0x04)), Index (DerefOf (Index (TBUF, Local0)), 0x04)) Return (One) } Method (FSIF, 0, NotSerialized) { Return (FBUF) } Method (RFAN, 1, NotSerialized) { And (Arg0, 0xFFFF, Local0) Store (FGET (Local0), Local1) Return (Local1) } Method (SFAN, 1, NotSerialized) { And (DerefOf (Index (Arg0, Zero)), 0xFFFF, Local0) Store (DerefOf (Index (FBUF, Zero)), Local1) If (LGreaterEqual (Local0, Local1)) { Return (Zero) } Increment (Local0) Store (DerefOf (Index (Arg0, One)), Index (DerefOf (Index (FBUF, Local0)), One)) Store (DerefOf (Index (Arg0, 0x02)), Index (DerefOf (Index (FBUF, Local0)), 0x02)) Store (DerefOf (Index (Arg0, 0x03)), Index (DerefOf (Index (FBUF, Local0)), 0x03)) Store (DerefOf (Index (Arg0, 0x04)), Index (DerefOf (Index (FBUF, Local0)), 0x04)) Return (One) } Method (QFIF, 0, NotSerialized) { If (LEqual (CPUQ, Zero)) { And (DerefOf (Index (QCFN, 0x05)), 0xFFFDFFFF, Local0) Store (Local0, Index (QCFN, 0x05)) } Else { Or (DerefOf (Index (QCFN, 0x05)), 0x00020000, Local0) Store (Local0, Index (QCFN, 0x05)) } Return (QBUF) } Method (GCQV, 1, NotSerialized) { If (LEqual (Arg0, Zero)) { Return (CPVL) } If (LEqual (Arg0, One)) { Return (CPVH) } If (LEqual (Arg0, 0x02)) { Return (CPVC) } Return (Zero) } } aml://PCI0._CRS aml://PCI0 --=[ PCI0._CRS ]=-- Method (_CRS, 0, NotSerialized) { Store (MG1L, Local0) If (Local0) { Store (MG1B, MIN5) Store (MG1L, LEN5) Add (MIN5, Decrement (Local0), MAX5) } Store (MG2B, MIN6) Store (MG2L, LEN6) Store (MG2L, Local0) Add (MIN6, Decrement (Local0), MAX6) Return (CRS) } aml://PCI0 --=[ PCI0 ]=-- Scope (PCI0) { Name (CRS, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) IO (Decode16, 0x0CF8, // Range Minimum 0x0CF8, // Range Maximum 0x01, // Alignment 0x08, // Length ) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x0000, // Range Minimum 0x0CF7, // Range Maximum 0x0000, // Translation Offset 0x0CF8, // Length ,, , TypeStatic) WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x0000, // Granularity 0x0D00, // Range Minimum 0xFFFF, // Range Maximum 0x0000, // Translation Offset 0xF300, // Length ,, , TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000A0000, // Range Minimum 0x000BFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00020000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C0000, // Range Minimum 0x000DFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00020000, // Length ,, _Y17, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000000, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, _Y18, AddressRangeMemory, TypeStatic) }) CreateDWordField (CRS, \_SB.PCI0._Y17._MIN, MIN5) CreateDWordField (CRS, \_SB.PCI0._Y17._MAX, MAX5) CreateDWordField (CRS, \_SB.PCI0._Y17._LEN, LEN5) CreateDWordField (CRS, \_SB.PCI0._Y18._MIN, MIN6) CreateDWordField (CRS, \_SB.PCI0._Y18._MAX, MAX6) CreateDWordField (CRS, \_SB.PCI0._Y18._LEN, LEN6) Method (_CRS, 0, NotSerialized) { Store (MG1L, Local0) If (Local0) { Store (MG1B, MIN5) Store (MG1L, LEN5) Add (MIN5, Decrement (Local0), MAX5) } Store (MG2B, MIN6) Store (MG2L, LEN6) Store (MG2L, Local0) Add (MIN6, Decrement (Local0), MAX6) Return (CRS) } } aml://_SB --=[ _SB ]=-- aml://_PTS --=[ _PTS ]=-- Method (_PTS, 1, NotSerialized) { Store (Arg0, DBG8) Store (One, PLED) PTS (Arg0) Store (Zero, Index (WAKP, Zero)) Store (Zero, Index (WAKP, One)) If (LAnd (LEqual (Arg0, 0x04), LEqual (OSFL (), 0x02))) { Sleep (0x0BB8) } Store (ASSB, WSSB) Store (AOTB, WOTB) Store (AAXB, WAXB) Store (Arg0, ASSB) Store (OSFL (), AOTB) Store (Zero, AAXB) } aml://_WAK --=[ _WAK ]=-- Method (_WAK, 1, NotSerialized) { ShiftLeft (Arg0, 0x04, DBG8) Store (Zero, PLED) WAK (Arg0) If (ASSB) { Store (WSSB, ASSB) Store (WOTB, AOTB) Store (WAXB, AAXB) } If (DerefOf (Index (WAKP, Zero))) { Store (Zero, Index (WAKP, One)) } Else { Store (Arg0, Index (WAKP, One)) } Return (WAKP) } aml://PTS --=[ PTS ]=-- aml://WAK --=[ WAK ]=-- dmesg://acpicompile dmesg:// pci://0000:00:00.0 Host bridge VIA Technologies, Inc. VT3351 Host Bridge Subsystem: VIA Technologies, Inc. VT3351 Host Bridge Flags: bus master, medium devsel, latency 64 Capabilities: [50] Power Management version 2 Capabilities: [60] HyperTransport: Slave or Primary Interface Capabilities: [58] #00 [0000] PCI config space: 00: 06 11 51 03 06 01 10 02 00 00 00 06 10 40 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 51 03 30: 00 00 00 00 50 00 00 00 00 00 00 00 00 00 00 00 40: 3f 63 08 00 00 00 00 00 00 00 1f c4 00 0c 00 01 50: 01 60 02 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 08 58 60 00 20 00 11 11 d0 00 00 00 22 06 75 00 70: 02 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 80: 02 50 30 00 07 02 00 1f 00 00 00 00 28 00 00 00 90: 80 01 00 00 20 0f 01 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 40 00 00 06 08 00 00 c0: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 08 00 00 98 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:00.1 Host bridge VIA Technologies, Inc. VT3351 Host Bridge Flags: bus master, medium devsel, latency 0 PCI config space: 00: 06 11 51 13 06 00 00 02 00 00 00 06 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:00.2 Host bridge VIA Technologies, Inc. VT3351 Host Bridge Flags: bus master, medium devsel, latency 0 PCI config space: 00: 06 11 51 23 06 00 00 02 00 00 00 06 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 03 8a 10 31 30 3c 80 86 7f cf 44 22 24 00 22 30 b0: 3f 13 c0 00 02 00 00 00 00 00 00 00 00 00 0e 00 c0: 20 aa 00 00 50 50 00 00 00 00 00 00 00 00 00 00 d0: 33 33 02 30 00 00 33 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:00.3 Host bridge VIA Technologies, Inc. VT3351 Host Bridge Flags: bus master, medium devsel, latency 0 PCI config space: 00: 06 11 51 33 06 00 00 02 00 00 00 06 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 22 22 00 00 00 00 e4 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: aa 00 c0 20 00 ff 19 00 40 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:00.4 Host bridge VIA Technologies, Inc. VT3351 Host Bridge Flags: bus master, medium devsel, latency 0 PCI config space: 00: 06 11 51 43 06 00 00 02 00 00 00 06 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 ff 00 00 00 00 00 1f 00 04 40 00 10 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:00.5 PIC VIA Technologies, Inc. VT3351 I/O APIC Interrupt Controller (prog-if 20 [IO(X)-APIC]) Flags: bus master, fast devsel, latency 0 PCI config space: 00: 06 11 51 53 06 00 00 00 00 20 00 08 10 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 8c 00 05 00 02 40 c0 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 2b 0e 00 00 23 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 85 00 00 11 08 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 7e 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:00.6 Host bridge VIA Technologies, Inc. Unknown device 6238 Subsystem: Unknown device 0008:0000 Flags: bus master, medium devsel, latency 0 PCI config space: 00: 06 11 38 62 06 00 00 02 00 00 00 06 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:00.7 Host bridge VIA Technologies, Inc. VT3351 Host Bridge Flags: bus master, medium devsel, latency 0 PCI config space: 00: 06 11 51 73 06 00 00 02 00 00 00 06 10 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 70 3b 88 82 82 44 00 30 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 06 01 00 93 55 88 88 61 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:01.0 PCI bridge VIA Technologies, Inc. [K8T890 North / VT8237 South] PCI Bridge (prog-if 00 [Normal decode]) Flags: bus master, 66MHz, medium devsel, latency 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 Capabilities: [70] Power Management version 2 PCI config space: 00: 06 11 99 b9 04 00 30 02 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 20 02 20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 70 00 00 00 00 00 00 00 00 00 03 00 40: 91 40 00 44 31 3a 99 b9 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 0e 70 35 00 07 02 00 1f 00 00 00 00 28 00 00 00 90: 80 00 00 00 00 08 01 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: bf 63 08 00 00 00 00 00 00 00 1f c4 00 04 00 00 c0: 08 00 0b ff 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:02.0 PCI bridge VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 Memory behind bridge: f9000000-fbcfffff Prefetchable memory behind bridge: 00000000d0000000-00000000dff00000 Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [68] Power Management version 2 Capabilities: [70] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable+ PCI config space: 00: 06 11 38 a2 07 05 10 40 00 00 04 06 10 00 01 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 f0 00 00 20 20: 00 f9 c0 fb 01 d0 f1 df 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 0b 00 40: 10 68 41 01 01 0f 00 00 00 00 12 00 01 0d 18 00 50: 00 00 01 21 60 00 00 00 00 00 48 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 70: 05 00 81 01 00 00 e0 fe 00 00 00 00 d9 40 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 54 30 f0 6c ff 7f 0c 00 00 00 00 00 00 00 00 b0: 0c 12 41 81 04 00 03 00 00 00 00 00 00 00 00 00 c0: 03 00 27 8a 44 44 44 44 44 44 44 44 00 00 00 00 d0: 50 20 00 50 02 00 00 00 00 00 00 00 08 00 02 a8 e0: 0c 06 80 92 f8 00 00 00 80 82 f8 00 00 00 00 00 f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:03.0 PCI bridge VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=06, subordinate=06, sec-latency=0 Prefetchable memory behind bridge: 00000000f7f00000-00000000f7f00000 Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [68] Power Management version 2 Capabilities: [70] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable+ PCI config space: 00: 06 11 38 c2 06 05 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 06 06 00 f0 00 00 00 20: f0 ff 00 00 f1 f7 f1 f7 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 03 00 40: 10 68 41 01 c1 0e 00 00 00 00 10 00 41 0c 18 01 50: 10 00 10 00 60 00 00 00 00 00 48 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 70: 05 00 81 01 00 00 e0 fe 00 00 00 00 e1 40 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 44 30 f0 7c ff 7f 0c 00 00 00 00 00 00 00 00 b0: 12 1b 41 81 04 00 03 00 00 00 00 00 00 00 00 00 c0: 03 00 27 8a 44 44 00 00 00 00 00 00 00 00 00 00 d0: 50 00 00 00 02 00 00 00 00 00 00 00 08 00 02 a8 e0: 00 0f 00 93 08 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:03.1 PCI bridge VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=05, subordinate=05, sec-latency=0 Prefetchable memory behind bridge: 00000000f7e00000-00000000f7e00000 Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [68] Power Management version 2 Capabilities: [70] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable+ PCI config space: 00: 06 11 38 d2 06 05 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 05 05 00 f0 00 00 00 20: f0 ff 00 00 e1 f7 e1 f7 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 02 03 00 40: 10 68 41 01 01 0e 00 00 00 00 10 00 11 0c 18 02 50: 00 00 00 00 60 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 70: 05 00 81 01 00 00 e0 fe 00 00 00 00 e9 40 00 00 80: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 44 30 f0 7c ff 7f 0c 00 00 00 00 00 00 00 00 b0: 12 1b 41 81 04 00 03 00 00 00 00 00 00 00 00 00 c0: 03 00 00 8a 44 44 44 44 00 00 00 00 00 00 00 00 d0: 50 00 00 00 00 00 00 00 00 00 00 00 08 00 02 a8 e0: 00 0f 00 02 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:03.2 PCI bridge VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 Memory behind bridge: fbd00000-fbdfffff Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [68] Power Management version 2 Capabilities: [70] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable+ PCI config space: 00: 06 11 38 e2 06 05 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 04 04 00 f0 00 00 20 20: d0 fb d0 fb f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 03 03 00 40: 10 68 41 01 81 0f 00 00 00 00 10 00 11 0c 18 03 50: 00 00 11 20 60 00 00 00 00 00 48 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 70: 05 00 81 01 00 00 e0 fe 00 00 00 00 32 40 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 44 30 f0 7c ff 7f 0c 00 00 00 00 00 00 00 00 b0: 12 1b 41 81 04 00 03 00 00 00 00 00 00 00 00 00 c0: 00 00 00 8a 04 00 00 00 00 00 00 00 00 00 00 00 d0: 50 00 00 00 00 00 00 00 00 00 00 00 08 00 02 a8 e0: 00 0f 00 02 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:03.3 PCI bridge VIA Technologies, Inc. K8T890 PCI to PCI Bridge Controller (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 Prefetchable memory behind bridge: 00000000f7d00000-00000000f7d00000 Capabilities: [40] Express Root Port (Slot+) IRQ 0 Capabilities: [68] Power Management version 2 Capabilities: [70] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable+ PCI config space: 00: 06 11 38 f2 06 05 10 00 00 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 03 03 00 f0 00 00 00 20: f0 ff 00 00 d1 f7 d1 f7 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 04 03 00 40: 10 68 41 01 01 0e 00 00 00 00 10 00 11 0c 18 04 50: 00 00 00 00 60 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00 70: 05 00 81 01 00 00 e0 fe 00 00 00 00 3a 40 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 44 30 f0 7c ff 7f 0c 00 00 00 00 00 00 00 00 b0: 12 1b 41 81 04 00 03 00 00 00 00 00 00 00 00 00 c0: 00 00 00 8a 04 00 00 00 00 00 00 00 00 00 00 00 d0: 50 00 00 00 00 00 00 00 00 00 00 00 08 00 02 a8 e0: 00 0f 00 02 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:0f.0 IDE interface VIA Technologies, Inc. VT8237A SATA 2-Port Controller (rev 80) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: VIA Technologies, Inc. VT8237A SATA 2-Port Controller Flags: bus master, medium devsel, latency 64, IRQ 90 I/O ports at dc00 [size=8] I/O ports at d880 [size=4] I/O ports at d800 [size=8] I/O ports at d480 [size=4] I/O ports at d400 [size=16] I/O ports at d000 [size=256] Capabilities: [c0] Power Management version 2 PCI config space: 00: 06 11 91 05 07 00 90 02 80 8f 01 01 00 40 80 00 10: 01 dc 00 00 81 d8 00 00 01 d8 00 00 81 d4 00 00 20: 01 d4 00 00 01 d0 00 00 00 00 00 00 06 11 91 05 30: 00 00 00 00 c0 00 00 00 00 00 00 00 0a 02 00 00 40: 03 03 f1 44 06 af 40 00 00 80 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 22 00 10 00 00 00 00 20 00 60: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 01 00 01 10 04 00 00 00 80: 00 00 00 00 00 00 00 00 00 40 29 1f 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 80 02 91 05 06 11 91 05 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:0f.1 IDE interface VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE (rev 07) (prog-if 8a [Master SecP PriP]) Subsystem: VIA Technologies, Inc. VT82C586/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE Flags: bus master, medium devsel, latency 32 I/O ports at fc00 [size=16] Capabilities: [c0] Power Management version 2 PCI config space: 00: 06 11 71 05 05 00 90 02 07 8a 01 01 00 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 fc 00 00 00 00 00 00 00 00 00 00 06 11 71 05 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 0b f2 09 05 18 8c c4 00 a8 a8 a8 20 ff 00 b6 20 50: 07 07 17 e6 0c 03 00 00 a8 a8 a8 a8 00 00 00 00 60: 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 70: 02 01 25 00 00 00 00 00 82 01 00 00 00 00 00 00 80: 00 f0 e0 1f 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 07 01 71 05 06 11 71 05 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:10.0 USB Controller VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev a0) (prog-if 00 [UHCI]) Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller Flags: bus master, medium devsel, latency 64, IRQ 74 I/O ports at c480 [size=32] Capabilities: [80] Power Management version 2 PCI config space: 00: 06 11 38 30 17 00 10 02 a0 00 03 0c 10 40 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 81 c4 00 00 00 00 00 00 00 00 00 00 06 11 38 30 30: 00 00 00 00 80 00 00 00 00 00 00 00 0a 01 00 00 40: 40 12 03 00 00 00 00 00 00 0b a0 03 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:10.1 USB Controller VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev a0) (prog-if 00 [UHCI]) Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller Flags: bus master, medium devsel, latency 64, IRQ 82 I/O ports at c800 [size=32] Capabilities: [80] Power Management version 2 PCI config space: 00: 06 11 38 30 17 00 10 02 a0 00 03 0c 10 40 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 c8 00 00 00 00 00 00 00 00 00 00 06 11 38 30 30: 00 00 00 00 80 00 00 00 00 00 00 00 02 02 00 00 40: 40 12 03 00 00 00 00 00 00 0b a0 03 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:10.2 USB Controller VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev a0) (prog-if 00 [UHCI]) Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller Flags: bus master, medium devsel, latency 64, IRQ 90 I/O ports at c880 [size=32] Capabilities: [80] Power Management version 2 PCI config space: 00: 06 11 38 30 17 00 10 02 a0 00 03 0c 10 40 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 81 c8 00 00 00 00 00 00 00 00 00 00 06 11 38 30 30: 00 00 00 00 80 00 00 00 00 00 00 00 0a 03 00 00 40: 40 12 03 00 00 00 00 00 00 0b a0 03 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:10.3 USB Controller VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev a0) (prog-if 00 [UHCI]) Subsystem: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller Flags: bus master, medium devsel, latency 64, IRQ 98 I/O ports at cc00 [size=32] Capabilities: [80] Power Management version 2 PCI config space: 00: 06 11 38 30 17 00 10 02 a0 00 03 0c 10 40 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 cc 00 00 00 00 00 00 00 00 00 00 06 11 38 30 30: 00 00 00 00 80 00 00 00 00 00 00 00 02 04 00 00 40: 40 12 03 00 00 00 00 00 00 0b a0 03 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:10.4 USB Controller VIA Technologies, Inc. USB 2.0 (rev 86) (prog-if 20 [EHCI]) Subsystem: VIA Technologies, Inc. USB 2.0 Flags: bus master, medium devsel, latency 64, IRQ 90 Memory at f8fffc00 (32-bit, non-prefetchable) [size=256] Capabilities: [80] Power Management version 2 PCI config space: 00: 06 11 04 31 17 00 10 02 86 20 03 0c 10 40 80 00 10: 00 fc ff f8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 04 31 30: 00 00 00 00 80 00 00 00 00 00 00 00 0a 03 00 00 40: 00 00 03 00 00 00 00 00 80 20 00 09 00 00 00 00 50: 00 5a 00 80 00 00 00 00 04 0b 55 65 03 53 00 00 60: 20 20 01 00 00 00 00 00 01 00 00 00 00 00 08 80 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 pci://0000:00:11.0 ISA bridge VIA Technologies, Inc. VT8237A PCI to ISA Bridge Subsystem: VIA Technologies, Inc. VT8237A PCI to ISA Bridge Flags: medium devsel Capabilities: [c0] Power Management version 2 PCI config space: 00: 06 11 37 33 03 00 10 02 00 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 37 33 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 44 40 f0 0b 00 00 10 00 0c 20 00 00 44 00 0a 00 50: c0 0d 09 00 00 00 00 00 62 00 00 0b 00 00 00 00 60: 00 00 00 00 00 00 00 05 00 00 00 00 00 00 00 00 70: 06 11 37 33 00 00 00 00 00 00 00 00 00 00 00 00 80: 20 84 59 00 88 00 00 00 01 08 00 00 05 18 00 00 90: 00 fe a3 88 30 c1 01 02 00 3c 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 04 05 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 06 00 24 69 ef 00 00 00 00 00 04 00 00 00 f0: 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 00 pci://0000:00:11.7 Host bridge VIA Technologies, Inc. VT8251 Ultra VLINK Controller Subsystem: VIA Technologies, Inc. Unknown device 337e Flags: bus master, medium devsel, latency 128 Capabilities: [58] HyperTransport: Interrupt Discovery and Configuration PCI config space: 00: 06 11 7e 28 06 01 10 02 00 00 00 06 00 80 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 7e 33 30: 00 00 00 00 58 00 00 00 00 00 00 00 00 00 00 00 40: f4 24 00 80 82 00 00 00 23 3b 88 80 82 44 80 43 50: 80 8f d3 03 00 04 01 40 08 00 01 80 00 00 00 00 60: 00 aa 00 20 ff 00 00 00 00 00 00 00 00 00 00 00 70: 42 c8 ee 01 3c 0f 50 48 01 00 00 00 77 00 12 02 80: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: fd 3f df 00 00 00 00 e0 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 50 68 88 8a 88 00 03 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 19 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:13.0 PCI bridge VIA Technologies, Inc. VT8237A Host Bridge (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=80, subordinate=80, sec-latency=0 Memory behind bridge: fbf00000-fbffffff Capabilities: [60] HyperTransport: MSI Mapping Capabilities: [70] #0d [0000] PCI config space: 00: 06 11 7b 33 06 01 10 20 00 00 04 06 00 00 81 00 10: 00 00 00 00 00 00 00 00 00 80 80 00 f0 00 00 02 20: f0 fb f0 fb f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 60 00 00 00 00 00 00 00 00 00 03 00 40: 02 00 06 06 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 08 70 02 a8 00 00 00 00 00 00 00 00 00 00 00 00 70: 0d 00 00 00 06 11 7b 33 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:13.1 PCI bridge VIA Technologies, Inc. VT8237A PCI to PCI Bridge (prog-if 01 [Subtractive decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=07, subordinate=07, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fbe00000-fbefffff Prefetchable memory behind bridge: 0000000050000000-0000000050000000 Capabilities: [60] HyperTransport: MSI Mapping Capabilities: [70] #0d [0000] PCI config space: 00: 06 11 7a 33 07 01 10 20 00 01 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 07 07 00 e0 e0 00 02 20: e0 fb e0 fb 01 50 01 50 00 00 00 00 00 00 00 00 30: 00 00 00 00 60 00 00 00 00 00 00 00 00 00 03 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 08 70 02 a8 00 00 00 00 00 00 00 00 00 00 00 00 70: 0d 00 00 00 06 11 7a 33 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:18.0 Host bridge Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration Flags: fast devsel Capabilities: [80] HyperTransport: Host or Secondary Interface PCI config space: 00: 22 10 00 11 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00 50: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00 60: 00 00 01 00 e4 00 00 00 20 c8 0e 0f 2c 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 08 00 01 21 20 00 11 11 22 06 75 80 02 00 00 00 90: 56 04 51 02 00 00 ff 00 07 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:18.1 Host bridge Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map Flags: fast devsel PCI config space: 00: 22 10 01 11 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 03 00 00 00 00 00 3f 00 00 00 00 00 01 00 00 00 50: 00 00 00 00 02 00 00 00 00 00 00 00 03 00 00 00 60: 00 00 00 00 04 00 00 00 00 00 00 00 05 00 00 00 70: 00 00 00 00 06 00 00 00 00 00 00 00 07 00 00 00 80: 03 00 e0 00 80 ff ef 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 03 0a 00 00 00 0b 00 00 03 00 40 00 00 ff ff 00 c0: 13 10 00 00 00 f0 ff 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 03 00 00 ff 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:18.2 Host bridge Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller Flags: fast devsel PCI config space: 00: 22 10 02 11 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: e0 3f 38 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 46 00 00 00 00 00 00 00 80: 02 00 00 00 00 00 00 00 34 f3 ef 5d 20 13 12 00 90: 10 08 01 00 5a 80 10 64 21 00 00 80 16 17 17 17 a0: eb 02 00 5d 00 00 00 00 00 00 00 00 00 00 00 00 b0: 34 08 fd 80 42 00 00 00 20 d0 04 31 0e b0 46 80 c0: 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 15 24 4c 40 64 62 0a 01 c2 ac c5 1f 10 4c 01 fc e0: c2 24 81 67 46 0e a4 8c 91 cc 40 e6 ca 4d 27 91 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:00:18.3 Host bridge Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control Flags: fast devsel Capabilities: [f0] #0f [0010] PCI config space: 00: 22 10 03 11 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 f0 00 00 00 00 00 00 00 00 00 00 00 40: 03 00 00 00 40 00 50 0a 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 40 f4 f3 8c 60: 11 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 11 01 02 51 11 80 00 50 00 2a 00 08 1a 22 00 00 80: 00 04 07 23 13 21 13 21 00 00 00 00 00 00 00 00 90: 00 00 00 00 23 28 00 00 80 62 72 9d 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 01 a7 0d 00 00 00 60 00 25 26 26 00 e0: 00 00 00 00 20 1b 52 00 19 17 00 00 00 00 00 00 f0: 0f 00 10 00 00 04 00 00 02 00 00 00 b2 0f 04 00 pci://0000:02:00.0 VGA compatible controller nVidia Corporation NV43 [GeForce 6600] (rev a2) (prog-if 00 [VGA]) Subsystem: Micro-Star International Co., Ltd. Unknown device 0410 Flags: bus master, fast devsel, latency 0, IRQ 11 Memory at fa000000 (32-bit, non-prefetchable) [size=16M] Memory at d0000000 (64-bit, prefetchable) [size=256M] Memory at f9000000 (64-bit, non-prefetchable) [size=16M] Expansion ROM at fbce0000 [disabled] [size=128K] Capabilities: [60] Power Management version 2 Capabilities: [68] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable- Capabilities: [78] Express Endpoint IRQ 0 PCI config space: 00: de 10 41 01 07 01 10 00 a2 00 00 03 10 00 00 00 10: 00 00 00 fa 0c 00 00 d0 00 00 00 00 04 00 00 f9 20: 00 00 00 00 00 00 00 00 00 00 00 00 62 14 10 04 30: 00 00 ce fb 60 00 00 00 00 00 00 00 0b 01 00 00 40: 62 14 10 04 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 00 00 01 00 00 00 ce d6 23 00 00 00 00 00 60: 01 68 02 00 00 00 00 00 05 78 80 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 10 00 01 00 c0 04 00 00 80: 10 28 0a 00 01 4d 01 00 08 00 01 01 00 00 00 00 90: 00 00 00 00 00 00 00 00 0c 08 40 c1 01 04 40 c1 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:04:00.0 Ethernet controller Attansic Technology Corp. L1 Gigabit Ethernet Adapter (rev b0) Subsystem: ASUSTeK Computer Inc. Unknown device 8226 Flags: bus master, fast devsel, latency 0, IRQ 11 Memory at fbdc0000 (64-bit, non-prefetchable) [size=256K] Expansion ROM at fbda0000 [disabled] [size=128K] Capabilities: [40] Power Management version 2 Capabilities: [48] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable- Capabilities: [58] Express Endpoint IRQ 0 Capabilities: [6c] Vital Product Data PCI config space: 00: 69 19 48 10 06 01 10 00 b0 00 00 02 10 00 00 00 10: 04 00 dc fb 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 26 82 30: 00 00 da fb 40 00 00 00 00 00 00 00 0b 01 00 00 40: 01 48 02 c0 00 00 00 00 05 58 80 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 10 6c 01 00 80 7f 00 00 60: 00 20 1a 00 11 f4 03 00 00 00 11 10 03 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 69 19 48 10 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:07:07.0 Ethernet controller Realtek Semiconductor Co., Ltd. RTL-8169 Gigabit Ethernet (rev 10) Subsystem: Realtek Semiconductor Co., Ltd. RTL-8169 Gigabit Ethernet Flags: bus master, 66MHz, medium devsel, latency 64, IRQ 66 I/O ports at e800 [size=256] Memory at fbeffc00 (32-bit, non-prefetchable) [size=256] Expansion ROM at 50000000 [disabled] [size=128K] Capabilities: [dc] Power Management version 2 PCI config space: 00: ec 10 69 81 17 01 b0 02 10 00 00 02 10 40 00 00 10: 01 e8 00 00 00 fc ef fb 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 69 81 30: 00 00 ec fb dc 00 00 00 00 00 00 00 0a 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 c2 f7 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 pci://0000:80:01.0 Audio device VIA Technologies, Inc. VIA High Definition Audio Controller (rev 10) Subsystem: ASUSTeK Computer Inc. Unknown device 81e7 Flags: bus master, fast devsel, latency 0, IRQ 66 Memory at fbffc000 (64-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Capabilities: [60] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable- Capabilities: [70] Express Unknown type IRQ 0 PCI config space: 00: 06 11 88 32 06 00 10 00 10 00 03 04 10 00 00 00 10: 04 c0 ff fb 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 e7 81 30: 00 00 00 00 50 00 00 00 00 00 00 00 0a 01 00 00 40: 00 30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00 60: 05 70 80 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 00 91 00 00 00 00 00 00 00 30 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 dmesg://pciresource dmesg:// dmesg://acpiinfo dmesg://